Design, analysis and implementation of voltage sensor for power-constrained systems

PhD ThesisThanks to an extensive effort by the global research community, the electronic technology has significantly matured over the last decade. This technology has enabled certain operations which humans could not otherwise easily perform. For instance, electronic systems can be used to perform sensing, monitoring and even control operations in environments such as outer space, underground, under the sea or even inside the human body. The main difficulty for electronics operating in these environments is access to a reliable and permanent source of energy. Using batteries as the immediate solution for this problem has helped to provide energy for limited periods of time; however, regular maintenance and replacement are required. Consequently, battery solutions fail wherever replacing them is not possible or operation for long periods is needed. For such cases, researchers have proposed harvesting ambient energy and converting it into an electrical form. An important issue with energy harvesters is that their operation and output power depend critically on the amount of energy they receive and because ambient energy often tends to be sporadic in nature, energy harvesters cannot produce stable or fixed levels of power all of the time. Therefore, electronic devices powered in this way must be capable of adapting their operation to the energy status of the harvester. To achieve this, information on the energy available for use is needed. This can be provided by a sensor capable of measuring voltage. However, stable and fixed voltage and time references are a prerequisite of most traditional voltage measurement devices, but these generally do not exist in energy harvesting environments. A further challenge is that such a sensor also needs to be powered by the energy harvester’s unstable voltage. In this thesis, the design of a reference-free voltage sensor, which can operate with a varying voltage source, is provided based on the capture of a portion of the total energy which is directly related to II the energy being sensed. This energy is then used to power a computation which quantifies captured energy over time, with the information directly generated as digital code. The sensor was fabricated in the 180 nm technology node and successfully tested by performing voltage measurements over the range 1.8 V to 0.8 V

An all-digital charge to digital converter

PhD ThesisDuring the last two decades, the topic of the Internet of Things (IoT) has become very popular. It provides an idea that everything in the real world should be connected with the internet in the future. Integrating sensors into small wireless networked nodes is a huge challenge due to the low power/energy budget in wireless sensor systems. An integrated sensor normally consumes significant power and has complex design which increases the cost. The core part of the sensor is the sensor interface which consumes major power especially for a capacitor-based sensor. Capacitive sensors and voltage sensors are two frequently used sensor types in the wireless sensor family. Capacitive sensors, that transform capacitance values into digital outputs, can be used in areas such as biomedical, environmental, and mobile applications. Voltage sensors are also widely used in many modern areas such as Energy Harvesting (EH) systems. Both of these sensors may make use of sensor interfaces to transform a measured analogue signal into a frequency output or a digital code for use in a digital system. Existing sensor interfaces normally use complex analog-to-digital converter (ADC) techniques that consume high power and suffers from slow sensing response. This thesis proposes a smart all-digital dual-use capacitorbased sensor interface called charge to digital converter (QDC). This QDC is capable of not only sensing capacitance but also sensing voltages by using fully digital solutions based on iterative delay chain discharge. Unlike the conventional methods vii that only treats the sensed capacitance only as the input signal, this thesis proposes a method that can directly use the stored energy from the sensed capacitance as well to power parts of the circuit, which simplifies the design and saves power. By playing with the capacitance and input voltage, it can be used as a capacitance-to-digital converter (CDC) to sense capacitance under fixed input voltage and it also can be used as a capacitorbased voltage sensor interface to measure voltage level under fixed capacitance. The new method achieves the same accuracy with less than half the circuit size, and 25% and 33% savings on power and energy consumption compared with the state of art benchmark. The method has been validated by experimenting with a chip fabricated in 350nm process, in addition to extensive simulation analysis

Voltage and capacitance sensing using time comparison

PhD ThesisWith the rapid advancement of electronic and mechanical system miniaturisation, new application types such as portable systems, internet of things (IoT) and wireless sensor networks (WSNs) have become promising areas of growth for industry. In these areas, the limits on battery life have opened opportunities for energy harvesting to become a commonplace choice as the system power source, which brings its own problems. One of these problems is that energy harvesting is in general a much more variable energy source than batteries and mains power supply, because of the unpredictable and intermittent nature of the external energy environment [1]. This implies that both energy harvesters and the loads they support require significantly more control, tuning and management than if the energy was supplied by traditional means. On the other hand, sensing is also an important aspect for such systems as many of these systems are sensors used to monitor physical parameters in the environment. Another reason is that the control, tuning and management of energy harvesting requires the support of energy/power sensing. It is therefore inevitable that sensing methods need to be developed targeting an environment where energy supply is volatile. However, sensing under a variable energy supply faces numerous problems. One such problem is the energy consumption of the sensing itself. In this regard, the capacitive sensor is widely used for sensing a physical parameter, such as pressure, position, and humidity, as it is suitable for low-power applications with limited energy budgets [2–4]. Another problem faced by sensing under energy supply variability is the difficulty of maintaining stable voltage and/or current references. This thesis is motivated by these issues. In this thesis, a new sensing method is developed based on time domain techniques, which will be shown to be 1) suitable for capacitive sensing of environmental physical parameters, 2) suitable for sensing voltage, from which power and energy information can be derived, supporting energy harvesting management uses, and 3) robust to voltage and power volatility, making sensors derived from this method useful for miniaturised and energy autonomous systems. At the centre of this work is a novel reference-free voltage level-crossing sensor, realised through time comparison techniques. By working in the time domain, it avoids the need for voltage or current references. Two more sophisticated sensors are then developed around this level-crossing sensing engine. The first is a voltage monitor which is capable of sensing the crossing of multiple predefined voltage boundaries within a range, targeting energy harvesting system management uses. The second is a capacitance-to-digital converter which senses and converts the value of a target capacitance to digital value. This could be used to support the monitoring of physical vi parameters in the environment including pressure, temperature, moisture, etc. as these might be made to directly affect the values of capacitances. This thesis describes detailed design theory and reasoning, implementation, and validation of the presented sensors. Circuits are implemented in very-large-scale integration and investigated in the Cadence Analog Design Environment. In addition to analogue simulations, experiments were also conducted on a fabricated chip. Data collected from these simulation and physical experiments show that the time-domain method developed in this work has quantitative and qualitative advantages over existing designs

Exploiting robustness in asynchronous circuits to design fine-tunable systems

PhD ThesisRobustness property in a circuit defines its tolerance to the effects of process, voltage and temperature variations. The mode signaling and event communication between computing units in a asynchronous circuits makes them inherently robust. The level of robustness depends on the type of delay assumptions used in the design and specification process. In this thesis, two approaches to exploiting robustness in asynchronous circuits to design self-adapting and fine-tunable systems are investigated. In the first investigation, a Digitally Controllable Oscillator (DCO) and a computing unit are integrated such that the operating conditions of the computing unit modulated the operation of the DCO. In this investigation, the computing unit which is a self-timed counter interacts with the DCO in a four-phase handshake protocol. This mode of interaction ensures a DCO and computing unit system that can fine-tune its operation to adapt to the effects of variations. In this investigation, it is shown that such a system will operate correctly in wide range of voltage supply. In the second investigation, a Digital Pulse-Width Modulator (DPWM) with coarse and fine-tune controls is designed using two Kessels counters. The coarse control of the DPWM tuned the pulse ratio and pulse frequency while the fine-tune control exploited the robustness property of asynchronous circuits in an addition-based delay system to add or subtract delay(s) to the pulse width while maintaining a constant pulse frequency. The DPWM realized gave constant duty ratio regardless of the operating voltage. This type of DPWM has practical application in a DC-DC converter circuit to tune the output voltage of the converter in high resolution. The Kessels counter is a loadable self-timed modulo−n counter, which is realized by decomposition using Horner’s method, specified and verified using formal asynchronous design techniques. The decomposition method used introduced parallelism in the system by dividing the counter into a systolic array of cells, with each cell further decomposed into two parts that have distinct defined operations. Specification of the decomposed counter cell parts operation was in three stages. The first stage employed high-level specification using Labelled Petri nets (LPN). In this form, functional correctness of the decomposed counter is modelled and verified. In the second stage, a cell part is specified by combing all possible operations for that cell part in high-level form. With this approach, a combination of inputs from a defined control block activated the correct operation for a cell part. In the final stage, the LPNs were converted to Signal Transition Graphs, from which the logic circuits of the cells were synthesized using the WorkCraft Tool. In this thesis, the Kessels counter was implemented and fabricated in 350 nm CMOS Technology.Niger Delta Development Commission (NDD

Power delivery mechanisms for asynchronous loads in energy harvesting systems

PhD ThesisFor systems depending on methods, a fundamental contradiction in the power delivery chain has existed between conventional to supply it. DC/DC conversion (e.g.) has therefore been an integral part of such systems to resolve this contradiction. be made tolerant to a much wider range of Vdd variance. This may open up opportunities for much more energy efficient methods of power delivery. performance of different power delivery mechanisms driving both asynchronous and synchronous loads directly from a harvester source bypassing bulky energy method, which employs a energy from a EH circuit depending on load and source conditions, is developed. through comprehensive comparative analysis. Based on the novel CBB power delivery method, an asynchronous controller is circuits to work with tasks. The successful asynchronous control design drives a case study that is meant to explore relations between power path and task path. To deal with different tasks with variable harvested power, systems may have a range of operation conditions and thus dynamically call for CBB or SCC type power set of capacitors to form CBB or SCC is implemented with economic system size. This work presents an unconventional way of designing a compact-size, quick- circuit overcome large voltage variation in EH systems and implement smart power management for harsh EH environment. The power delivery mechanisms (SCC, employed to help asynchronous- logic-based chip testing and micro-scale EH system demonstrations