A Survey of Non-conventional Techniques for Low-voltage Low-power Analog Circuit Design

Designing integrated circuits able to work under low-voltage (LV) low-power (LP) condition is currently undergoing a very considerable boom. Reducing voltage supply and power consumption of integrated circuits is crucial factor since in general it ensures the device reliability, prevents overheating of the circuits and in particular prolongs the operation period for battery powered devices. Recently, non-conventional techniques i.e. bulk-driven (BD), floating-gate (FG) and quasi-floating-gate (QFG) techniques have been proposed as powerful ways to reduce the design complexity and push the voltage supply towards threshold voltage of the MOS transistors (MOST). Therefore, this paper presents the operation principle, the advantages and disadvantages of each of these techniques, enabling circuit designers to choose the proper design technique based on application requirements. As an example of application three operational transconductance amplifiers (OTA) base on these non-conventional techniques are presented, the voltage supply is only ±0.4 V and the power consumption is 23.5 µW. PSpice simulation results using the 0.18 µm CMOS technology from TSMC are included to verify the design functionality and correspondence with theory

Current-mode Biquadratic Universal Filter Design with Two Terminal Unity Gain Cells

A grounded parallel lossy active inductor and two current-mode (CM) universal filters are presented in this paper. All the circuits use two voltage followers (VFs) and a current follower (CF). The parallel lossy active inductor includes a grounded capacitor which is attractive in integrated circuit (IC) technology. The CM universal filters have one input and standard three outputs such as band-pass (BP), low-pass (LP) and high-pass (HP) responses. All-pass and notch outputs can be obtained by adding extra one CF. Suggested structures in this paper can be constructed with commercially available active devices such as AD844s. Non-ideal gain and intrinsic X-terminal parasitic resistor effects are examined. Several computer simulations with SPICE program and experimental results by employing AD844s are drawn to verify theoretical ones

Evaluation of the utility of sediment data in NASQAN (National Stream Quality Accounting Network)

Monthly suspended sediment discharge measurements, made by the USGS as part of the National Stream Quality Accounting Network (NASQAN), are analysed to assess the adequacy in terms of spatial coverage, temporal sampling frequency, accuracy of measurements, as well as in determining the sediment yield in the nation's rivers. It is concluded that the spatial distribution of NASQAN stations is reasonable but necessarily judgemental. The temporal variations of sediment data contain much higher frequencies than monthly. Sampling error is found to be minor when compared with other causes of data scatter which can be substantial. The usefulness of the monthly measurements of sediment transport is enhanced when combined with the daily measurements of water discharge. Increasing the sampling frequency moderately would not materially improve the accuracy of sediment yield determinations

On the Implementation of Efficient Channel Filters for Wideband Receivers by Optimizing Common Subexpression Elimination Methods

No abstract availabl

Maximum Average Service Rate and Optimal Queue Scheduling of Delay-Constrained Hybrid Cognitive Radio in Nakagami Fading Channels

As a promising technique to improve achievable bandwidth efficiency, cognitive radio (CR) has attracted substantial research attention from both the academic and industrial communities. To improve the performance attained by the secondary user (SU), a novel hybrid CR system is proposed, which combines the conventional interweave and underlay paradigms to enhance the chance of the SU to access the spectrum. Queuing theory is invoked in this paper to analyze the impact of the primary user’s maximum tolerable delay on the performance of the SU. Multiple queues are assumed for the SU, which is engaged in video communication. Apart from the Poisson traffic generation,we also model the classic Nakagami-m fading channel as a Poisson service process by utilizing the outage probability in the presence of cochannel interference. We optimize both the hybrid interweave/underlay procedure to maximize the average service rate μ_S,max of the SU, as well as the queue’s scheduling scheme, for the sake of minimizing the overall average delay (OAD). As a result, the OAD of the SU is reduced by up to 27% and 20%, compared with the proportion and round-robin schemes, respectively

DESIGNING LOW VOLTAGE AND POWER CMOS OP AMP

The importance of using low supply voltage for analogue circuit has enormously increased in recent past. The recent trend shows that a supply voltage can be degraded until 1.5 V. Low power consumption also important to increase the battery life, the packaging density and circuit reliability. CMOS op amp technology today can have power consumption lower than 200 uW. The objective of this project is to design low supply voltage and low power consumption CMOS operational amplifier. Low supply voltage op amp with 1.6 V has been successfully designed. The design was using bulk-driven PMOS transistors as an input differential of the op amp. The compensation capacitor was also used to control the power consumption. The op amp is capable of producing low power consumption of 20 uAV. The layout was design using 0.35 urn technology and have gone through DRC and LVS check. Software Virtuoso Schematic Capture and Virtuoso Spectre Circuit Simulator from cadence have been used for schematic capture and design simulation. For layout design, DRC and LVS check, softwere Calibre from Mentor Graphic have been used. I

Switching frequency regulation in sliding mode control by a hysteresis band controller

© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksFixing the switching frequency is a key issue in sliding mode control implementations. This paper presents a hysteresis band controller capable of setting a constant value for the steady-state switching frequency of a sliding mode controller in regulation and tracking tasks. The proposed architecture relies on a piecewise linear modeling of the switching function behavior within the hysteresis band, and consists of a discrete-time integral-type controller that modifies the amplitude of the hysteresis band of the comparator in accordance with the error between the desired and the actually measured switching period. For tracking purposes, an additional feedforward action is introduced to compensate the time variation of the switching function derivatives at either sides of the switching hyperplane in the steady state. Stability proofs are provided, and a design criterion for the control parameters to guarantee closed-loop stability is subsequently derived. Numerical simulations and experimental results validate the proposal.Accepted versio