50 research outputs found

    On Design of CIC Decimators

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    RF applications in digital signal processing

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    Ever higher demands for stability, accuracy, reproducibility, and monitoring capability are being placed on Low-Level Radio Frequency (LLRF) systems of particle accelerators. Meanwhile, continuing rapid advances in digital signal processing technology are being exploited to meet these demands, thus leading to development of digital LLRF systems. The rst part of this course will begin by focusing on some of the important building-blocks of RF signal processing including mixer theory and down-conversion, I/Q (amplitude and phase) detection, digital down-conversion (DDC) and decimation, concluding with a survey of I/Q modulators. The second part of the course will introduce basic concepts of feedback systems, including examples of digital cavity eld and phase control, followed by radial loop architectures. Adaptive feed-forward systems used for the suppression of repetitive beam disturbances will be examined. Finally, applications and principles of system identi cation approaches will be summarized

    Back-end Design of the Readout System for Cryogenic Particle Detectors

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    Diese Arbeit widmet sich dem Design und der Entwicklung des digitalen Back-Ends (D-BE) für Raumtemperatur-Ausleseelektronik, die in kryogenen Quantendetektoren verwendet wird. Der Schwerpunkt liegt auf Anwendungen im Zusammenhang mit Experimenten zur Kosmischen Hintergrundstrahlung (CMB, im Englischen \textit{Cosmic Microwave Background radiation} genannt), jedoch ist die Technologie anpassbar für Partikeldetektionsexperimente. Zwei Schlüsselprojekte stehen im Mittelpunkt dieser Forschung: das QUBIC-Projekt zur Erkennung der B-Mode-Polarisation des CMB und das ECHo-Experiment, das darauf abzielt, eine neue Obergrenze für die Bestimmung der Neutrinomasse im Sub-eV-Bereich festzulegen. In diesen Projekten werden Übergangskanten-Sensoren (TES) und magnetische Mikrokalorimeter (MMCs) eingesetzt. Im Fall des QUBIC-Projekts werden die TES unter Verwendung von Zeitaufteilungsmultiplexing (TDM) gemultiplext. Es wurde jedoch ein Vorschlag für einen neuen Bolo\-meter-Typ namens Magnetischer Mikrobolometer (MMB) in der QUBIC-Kollaboration vorgestellt, der die Implementierung eines Frequenzaufteilungsmultiplexing (FDM)-Sys\-tems ermöglicht. Dies könnte durch die Verwendung eines Mikrowellen-Supraleiter-Quan\-teninterferenzgerät (SQUID)-Multiplexers (μ\muMUX) erreicht werden, ähnlich wie bei den MMCs im ECHo-Experiment. Zur Erleichterung der Auslese der gemultiplexten Detektoren wird ein mehrtoniges Signal erzeugt, wobei jede Frequenztonkomponente einen μ\muMUX-Kanal innerhalb des Kryostaten überwacht. Dieses Signal passiert dann einen rauscharmen Verstärker (LNA, im Englischen \textit{Low-Noise Amplifier} genannt), der in der Regel in der 4 K-Stufe liegt, bevor es das Hochfrequenz-Front-End (RF-FE) erreicht. Das RF-FE umfasst Hochfrequenzelektronik, die sowohl mit dem D-BE als auch mit der Elektronik im Kryostaten verbunden ist. Diese Arbeit stellt eine neuartige Anwendung des Goertzel-Filters zur Kanalisierung von mehrtonigen Signalen vor. Durch Simulationen, die mit einem in dieser Arbeit entwickelten auf Python basierenden Softwarepaket durchgeführt wurden, wurde die optimale Konfiguration für die Signalgenerierung und -erfassung in Bezug auf Rauschleistung, Abschirmung gegen Übersprechen und Systemlinearität ermittelt. Diese Arbeit zeigt, wie dieser Ansatz effizient in einem Field Programmable Gate Array (FPGA) implementiert werden kann, was die Skalierbarkeit bei der Auslese mehrerer Sensoren ermöglicht. Diese Skalierung is im Besonderen in Anwendungen wie Radioteleskopen für CMB-Messungen, kryogenen Kalorimetern für die Partikeldetektion und Quantencomputing entscheidend. Umfangreiche Validierungsexperimente zeigen, wie die Implementierung dieses Filtersatzes die Kanalisierung des mehrtonigen Eingangssignals zur Wiederherstellung der von den Detektoren aufgezeichneten Daten ermöglicht

    Design and Implementation of an RF Front-End for Software Defined Radios

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    Software Defined Radios have brought a major reformation in the design standards for radios, in which a large portion of the functionality is implemented through pro­ grammable signal processing devices, giving the radio the ability to change its op­ erating parameters to accommodate new features and capabilities. A software radio approach reduces the content of radio frequency and other analog components of the traditional radios and emphasizes digital signal processing to enhance overall receiver flexibility. Field Programmable Gate Arrays (FPGA) are a suitable technology for the hardware platform as they offer the potential of hardware-like performance coupled with software-like programmability. Software defined radio is a very broad field, encompassing the design of various technologies all the way from the antenna to RF, IF, and baseband digital design. The RF section primarily consists of analog hardware modules. The IF and baseband sections are primarily digital. It is the general process of the radio to convert the incoming signal from RF to IF and then IF to baseband for better signal processing system. In this thesis, some of major building blocks of a Software defined radio are de­ signed and implemented using FPGAs. The design of a Digital front end, which provides the bridge between the baseband and analog RF portions of a wireless receiver, is synthesized. The Digital front end receiver consists of a digital down converter(DDC) which in turn comprises of a direct digital frequency synthesizer (DDFS), a phase accumulator and a low pass filter. The signal processing block of the DDFS is executed using Co-ordinate Rotation Digital Computer (CORDIC) iii Abstract algorithm. Cascaded-Integrator-Comb filters (CIC) are implemented for changing the sample rate of the incoming data. Application of a DDC includes software ra­ dios, multicarrier, multimode digital receivers, micro and pico cell systems,broadband data applications, instrumentation and test equipment and in-building wireless tele­ phony. Also, in this thesis, interfaces for connecting Texas Instruments high speed and high resolution Analog-to-Digital converters (ADC) and Digital-to-Analog converters (DAC) with Xilinx Virtex-5 FPGAs are also implemented and demonstrated

    Design and VLSI implementation of a decimation filter for hearing Aid applications

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    Approximately 10% of the world’s population suffers from some type of hearing loss, yet only small percentage of this statistic use the hearing aid. The stigma associated with wearing a hearing aid, customer dissatisfaction with hearing aid performance, the cost and the battery life. Through the use of digital signal processing the digital hearing aid now offers what the analog hearing aid cannot offer. Currently lot of attention is being given to low power VLSI design. More and more people around the world suffer from hearing losses. The increasing average age and the growing population are the main reasons for this. The decimation filter used for hearing aid applications is designed and implemented both in MATLAB and VHDL. The decimation filter is designed using the distributed arithmetic multiplier in VHDL. Each digital filter structure is simulated using Matlab and its complete architecture is captured using Simulink. The resulting architecture is hardware efficient and consumes less power compared to conventional decimation filters. Compared to the comb-FIR-FIR architecture, the designed decimation filter architecture using Comb-half band FIR-FIR contributes to a hardware saving and reduces the power dissipation

    Design Of Polynomial-based Filters For Continuously Variable Sample Rate Conversion With Applications In Synthetic Instrumentati

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    In this work, the design and application of Polynomial-Based Filters (PBF) for continuously variable Sample Rate Conversion (SRC) is studied. The major contributions of this work are summarized as follows. First, an explicit formula for the Fourier Transform of both a symmetrical and nonsymmetrical PBF impulse response with variable basis function coefficients is derived. In the literature only one explicit formula is given, and that for a symmetrical even length filter with fixed basis function coefficients. The frequency domain optimization of PBFs via linear programming has been proposed in the literature, however, the algorithm was not detailed nor were explicit formulas derived. In this contribution, a minimax optimization procedure is derived for the frequency domain optimization of a PBF with time-domain constraints. Explicit formulas are given for direct input to a linear programming routine. Additionally, accompanying Matlab code implementing this optimization in terms of the derived formulas is given in the appendix. In the literature, it has been pointed out that the frequency response of the Continuous-Time (CT) filter decays as frequency goes to infinity. It has also been observed that when implemented in SRC, the CT filter is sampled resulting in CT frequency response aliasing. Thus, for example, the stopband sidelobes of the Discrete-Time (DT) implementation rise above the CT designed level. Building on these observations, it is shown how the rolloff rate of the frequency response of a PBF can be adjusted by adding continuous derivatives to the impulse response. This is of great advantage, especially when the PBF is used for decimation as the aliasing band attenuation can be made to increase with frequency. It is shown how this technique can be used to dramatically reduce the effect of alias build up in the passband. In addition, it is shown that as the number of continuous derivatives of the PBF increases the resulting DT implementation more closely matches the Continuous-Time (CT) design. When implemented for SRC, samples from a PBF impulse response are computed by evaluating the polynomials using a so-called fractional interval, µ. In the literature, the effect of quantizing µ on the frequency response of the PBF has been studied. Formulas have been derived to determine the number of bits required to keep frequency response distortion below prescribed bounds. Elsewhere, a formula has been given to compute the number of bits required to represent µ to obtain a given SRC accuracy for rational factor SRC. In this contribution, it is shown how these two apparently competing requirements are quite independent. In fact, it is shown that the wordlength required for SRC accuracy need only be kept in the µ generator which is a single accumulator. The output of the µ generator may then be truncated prior to polynomial evaluation. This results in significant computational savings, as polynomial evaluation can require several multiplications and additions. Under the heading of applications, a new Wideband Digital Downconverter (WDDC) for Synthetic Instruments (SI) is introduced. DDCs first tune to a signal\u27s center frequency using a numerically controlled oscillator and mixer, and then zoom-in to the bandwidth of interest using SRC. The SRC is required to produce continuously variable output sample rates from a fixed input sample rate over a large range. Current implementations accomplish this using a pre-filter, an arbitrary factor resampler, and integer decimation filters. In this contribution, the SRC of the WDDC is simplified reducing the computational requirements to a factor of three or more. In addition to this, it is shown how this system can be used to develop a novel computationally efficient FFT-based spectrum analyzer with continuously variable frequency spans. Finally, after giving the theoretical foundation, a real Field Programmable Gate Array (FPGA) implementation of a novel Arbitrary Waveform Generator (AWG) is presented. The new approach uses a fixed Digital-to-Analog Converter (DAC) sample clock in combination with an arbitrary factor interpolator. Waveforms created at any sample rate are interpolated to the fixed DAC sample rate in real-time. As a result, the additional lower performance analog hardware required in current approaches, namely, multiple reconstruction filters and/or additional sample clocks, is avoided. Measured results are given confirming the performance of the system predicted by the theoretical design and simulation

    SPCATS (Sound Programme Circuit Automatic Test-Set)

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    Computationally efficient music synthesis : methods and sound design

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    Tässä diplomityössä esitetään musiikkisyntetisaattorin suunnittelua systeemille, jonka laskentateho ja muistikapasiteetti ovat rajoitettuja. Ensiksi kerrataan mahdollisia synteesitekniikoita sekä arvioidaan niiden käyttökelpoisuutta laskennallisesti tehokkaassa musiikkisynteesissä. Käytännössä käyttökelpoiset tekniikat ovat lisäävä ja lähde-suodinsynteesit, ja erikoistapauksissa taajuusmodulaatio-, aaltotaulukko- ja samplaussynteesit. Tämän jälkeen käyttökelpoisten tekniikoiden rakenteiden suunnittelua esitetään tarkemmin, sekä esitetään näiden rakenteiden ominaisuuksia ja suunnitteluongelmia. Suurin ongelma kohdataan digitaalisessa lähde-suodinsynteesissä, jossa klassisten aaltomuotojen, kuten saha-aallon käyttö lähdesignaalina on ongelmallista laskostumisen takia, joka johtuu aaltomuodossa olevista epäjatkuvuuksista. Olemassa olevia kaistarajoitettuja aaltomuotosynteesimenetelmiä kerrataan, ja polynomimuotoiseen kaistarajoitetuun askelfunktioon perustuvaa menetelmää esitellään tarkemmin antamalla suunnittelusääntöjä käyttökelpoisille polynomeille. Menetelmää testataan lisäksi kahdella kolmannen asteen polynomilla. Nämä polynomit vähentävät laskostumista korkeilla taajuuksilla enemmän verrattuna ensimmäisen asteen polynomiin, mutta pienillä taajuksilla ensimmäisen asteen polynomi tuottaa parempia tuloksia. Lisäksi kerrataan muita mahdollisia ääniefektialgoritmeja ja arvioidaan niiden käyttökelpoisuutta laskennallisesti tehokkaassa musiikkisynteesissä. Useasti äänisynteesisysteemin täytyy pystyä generoimaan musiikkia, jossa käytetään monia erilaisia ääniä, jotka ulottuvat oikeista akustisista soittimista elektronisiin soittimiin ja luonnon ääniin. Siksi tällainen systeemi tarvitsee huolellista äänten suunnittelua. Tässä diplomityössä esitetään suunnittelusääntöjä erilaisten äänien imitoimiseksi. Lisäksi esitellään synteesimenetelmien parametrien vaikutus äänivarianttien suunnitteluun.In this thesis, the design of a music synthesizer for systems suffering from limitations in computing power and memory capacity is presented. First, different possible synthesis techniques are reviewed and their applicability in computationally efficient music synthesis is discussed. In practice, the applicable techniques are limited to additive and source-filter synthesis, and, in special cases, to frequency modulation, wavetable and sampling synthesis. Next, the design of the structures of the applicable techniques are presented in detail, and properties and design issues of these structures are discussed. A major implementation problem is raised in digital source-filter synthesis, where the use of classic waveforms, such as sawtooth wave, as the source signal is challenging due to aliasing caused by waveform discontinuities. Methods for existing bandlimited waveform synthesis are reviewed, and a new approach using polynomial bandlimited step function is presented in detail with design rules for the applicable polynomials. The approach is also tested with two different third-order polynomials. They reduce aliasing more at high frequencies, but at low frequencies their performance is worse than with the first-order polynomial. In addition, some commonly used sound effect algorithms are reviewed with respect to their applicability in computationally efficient music synthesis. In many cases the sound synthesis system must be capable of producing music consisting of various different sounds ranging from real acoustic instruments to electronic instruments and sounds from nature. Therefore, the music synthesis system requires careful sound design. In this thesis, sound design rules for imitation of various sounds using the computationally efficient synthesis techniques are presented. In addition, the effects of the parameter variation for the design of sound variants are presented
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