377 research outputs found

    Evolving Combinational Logic Circuits Using a Hybrid Quantum Evolution and Particle Swarm Inspired Algorithm

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    In this paper, an algorithm inspired from quantum evolution and particle swarm to evolve combinational logic circuits is presented. This algorithm uses the framework of the local version of particle swarm optimization with quantum evolutionary algorithms, and integer encoding. A multi-objective fitness function is used to evolve the combinational logic circuits in order obtain feasible circuits with minimal number of gates in the design. A comparative study indicates the superior performance of the hybrid quantum evolution-particle swarm inspired algorithm over the particle swarm and other evolutionary algorithms (such as genetic algorithms) independently

    Crossing genetic and swarm intelligence algorithms to generate logic circuits

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    Genetic Algorithms (GAs) are adaptive heuristic search algorithm based on the evolutionary ideas of natural selection and genetic. The basic concept of GAs is designed to simulate processes in natural system necessary for evolution, specifically those that follow the principles first laid down by Charles Darwin of survival of the fittest. On the other hand, Particle swarm optimization (PSO) is a population based stochastic optimization technique inspired by social behavior of bird flocking or fish schooling. PSO shares many similarities with evolutionary computation techniques such as GAs. The system is initialized with a population of random solutions and searches for optima by updating generations. However, unlike GA, PSO has no evolution operators such as crossover and mutation. In PSO, the potential solutions, called particles, fly through the problem space by following the current optimum particles. PSO is attractive because there are few parameters to adjust. This paper presents hybridization between a GA algorithm and a PSO algorithm (crossing the two algorithms). The resulting algorithm is applied to the synthesis of combinational logic circuits. With this combination is possible to take advantage of the best features of each particular algorithm

    Combining genetic and particle swarm algorithms for the design of combinational circuits

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    Evolutionary computation (EC) is a growing research field of Artificial Intelligence (AI) and is divided in two main areas: the Evolutionary Algorithms (EA) and the Swarm Intelligence (SI). This paper presents an algorithm that combines an EA algorithm - the Genetic Algorithm (GA) with a SI algorithm - the Particle Swarm Optimization Algorithm (PSO). The new algorithm is applied to the synthesis of combinational logic circuits. With this combination is possible to take advantage of the best features of each particular algorithm.N/

    Evolving Combinational Logic Circuits Using a Hybrid Quantum Evolution and Particle Swarm Inspired Algorithm

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    An algorithm inspired from quantum evolution and particle swarm optimization is used to evolve combinational logic circuits. This algorithm uses the framework of the local version of particle swarm optimizations with quantum evolutionary algorithms, and integer encoding. A multi-objective fitness function is used to evolve the digital circuits in order to obtain a variety of feasible circuits with minimal number of gates in the design. A comparative study indicates the superior performance of the hybrid quantum evolution-particle swarm inspired algorithm over the particle swarm and other evolutionary algorithms (such as genetic algorithms) independently

    Verification Method for Area Optimization of Mixed - Polarity Reed - Muller Logic Circuits

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    Area minimization of mixed-polarity Reed-Muller (MPRM) logic circuits is an important step in logic synthesis. While previous studies are mainly based on various artificial intelligence algorithms and not comparable with the results from the mainstream electronics design automation (EDA) tool. Furthermore, it is hard to verify the superiority of intelligence algorithms to the EDA tool on area optimization. To address these problems, a multi-step novel verification method was proposed. First, a hybrid simulated annealing (SA) and discrete particle swarm optimization (DPSO) approach (SADPSO) was applied to optimize the area of the MPRM logic circuit. Second, a Design Compiler (DC) algorithm was used to optimize the area of the same MPRM logic circuit under certain settings and constraints. Finally, the area optimization results of the two algorithms were compared based on MCNC benchmark circuits. Results demonstrate that the SADPSO algorithm outperforms the DC algorithm in the area optimization for MPRM logic circuits. The SADPSO algorithm saves approximately 9.1% equivalent logic gates compared with the DC algorithm. Our proposed verification method illustrates the efficacy of the intelligence algorithm in area optimization compared with DC algorithm. Conclusions in this study provide guidance for the improvement of EDA tools in relation to the area optimization of combinational logic circuits

    NSF CAREER: Scalable Learning and Adaptation with Intelligent Techniques and Neural Networks for Reconfiguration and Survivability of Complex Systems

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    The NSF CAREER program is a premier program that emphasizes the importance the foundation places on the early development of academic careers solely dedicated to stimulating the discovery process in which the excitement of research enriched by inspired teaching and enthusiastic learning. This paper describes the research and education experiences gained by the principal investigator and his research collaborators and students as a result of a NSF CAREER proposal been awarded by the power, control and adaptive networks (PCAN) program of the electrical, communications and cyber systems division, effective June 1, 2004. In addition, suggestions on writing a winning NSF CAREER proposal are presented

    Soft Computing Approach To Automatic Test Pattern Generation For Sequential Vlsi Circuit

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    Due to the constant development in the integrated circuits, the automatic test pattern generation problem become more vital for sequential vlsi circuits in these days. Also testing of integrating circuits and systems has become a difficult problem. In this paper we have discussed the problem of the automatic test sequence generation using particle swarm optimization(PSO) and technique for structure optimization of a deterministic test pattern generator using genetic algorithm(GA)

    Applications of fractional calculus in electrical and computer engineering

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    Fractional Calculus (FC) goes back to the beginning of the theory of differential calculus. Nevertheless, the application of FC just emerged in the last two decades, due to the progress in the area of chaos that revealed subtle relationships with the FC concepts. In the field of dynamical systems theory some work has been carried out but the proposed models and algorithms are still in a preliminary stage of establishment. Having these ideas in mind, the paper discusses a FC perspective in the study of the dynamics and control of several systems. This article illustrates several applications of fractional calculus in science and engineering. It has been recognized the advantageous use of this mathematical tool in the modeling and control of many dynamical systems. In this perspective, this paper investigates the use of FC in the fields of controller tuning, electrical systems, digital circuit synthesis, evolutionary computing, redundant robots, legged robots, robotic manipulators, nonlinear friction and financial modeling.N/
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