Design of a Low-Cost Passive UHF RFID tag in 0.18um CMOS technology

The work addresses the design of a passive UHF Radio-Frequency Identification (RFID) tag. In order to realize a product able to be competitive in the RFID expanding market, a cost reduction policy has been applied in the design: a general purpose digital technology has been employed, resorting to specific techniques in order to overcome the limitations due to the lack of process options. Such solutions are accurately described, and every block composing the transponder analog frontend is analyzed, highlighting advantages and disadvantages of the proposed architectures with respect to the ones present in literature. The circuits theory is validated through simulations and experimental data.Il lavoro di tesi è imperniato sul progetto di un tag passivo per l'Identificazione a Radio-Frequenza (RFID) operante nelle bande UHF. Per il progetto è stata applicata una politica di riduzione dei costi, così da proporre un prodotto in grado di essere competitivo nel fiorente mercato dell'RFID: è stata scelta una tecnologia digitale general-purpose, e specifiche tecniche di progettazione sono state utilizzate per superare le limitazioni dovute alla scarsità di opzioni di processo. Le soluzioni adottate sono descritte accuratamente, ed è riportata l'analisi di ogni singolo blocco componente il frontend analogico, evidenziando vantaggi e svantaggi delle architetture proposte rispetto a quelle presenti in letteratura. La validità della teoria alla base dei circuiti è stata verificata tramite simulazioni e dati sperimentali

Ultra Low Power IEEE 802.15.4/ZIGBEE Compliant Transceiver

Low power wireless communications is the most demanding request among all wireless users. A battery life that can survive for years without being replaced, makes it realistic to implement many applications where the battery is unreachable (e.g. concrete walls) or expensive to change (e.g underground applications). IEEE 802.15.4/ZIGBEE standard is published to cover low power low cost applications, where the battery life can last for years, because of the 1% duty cycle of operation. A fully integrated 2.4GHz IEEE802.15.4 Compliant transceiver suitable for low power, low cost ZIGBEE applications is implemented. Direct conversion architecture is used in both Receiver and Transmitter, to achieve the minimum possible power and area. The chip is fabricated in a standard 0.18um CMOS technology. In the transmit mode, the transmitter chain (Modulator to PA) consumes 25mW, while in the receive mode, the iv receiver chain (LNA to Demodulator) consumes 5mW. The Integer-N Frequency Synthesizer consumes 8.5mW. Other Low power circuits are reported; A 13.56 Passive RFID tag and a low power ADC suitable for Built-In-Testing applications

Energy Transmission for Long-Range Passive Sensor Transponders

Drahtlose Energieübertragung ermöglicht den Betrieb von mikroelektronischen Transpondern (sog. „Tags“) ohne Batterie oder Solarzellen. Eine Basisstation sendet ein elektromagnetisches Feld zur Übertragung von Energie und Daten an einen oder mehrere Transponder. Diese bestehen in der Regel aus einer integrierten Schaltung und einer Antenne. Passive Sensor Transponder ermöglichen die Erfassung von physikalischen Umgebungsgrößen wie z.B. Druck oder Temperatur. Da induktive Systeme in ihrer Reichweite stark beschränkt sind, wird in dieser Arbeit der Ansatz der Energieübertragung über elektromagnetische Wellen im UHF Bereich betrachtet. Das Antennensignal wird im Chip in eine Gleichspannung zur Versorgung der integrierten Schaltungen umgewandelt. Die Effizienz des Systems wird im Wesentlichen von der unvermeidlichen Freiraumdämpfung und der Effizienz des Gleichrichters bestimmt. In großem Abstand zur Basisstation hat die Antennenspannung eine geringe Amplitude, und die Implementierung eines effizienten Gleichrichters stellt weiterhin eine Herausforderung dar. Die Modellierung und Analyse dieser Schaltung, sowie die Erarbeitung neuartiger Topologien, bilden den Kern dieser Arbeit. Das erste Ziel ist in diesem Zusammenhang die analytische Beschreibung des Gleichrichters unter Berücksichtigung der parasitären Eigenschaften realer Bauelemente in einem standard CMOS Prozess. In existierenden Arbeiten wurden Schaltungsmodelle für die Villard-Schaltung mit Schottky Dioden erstellt. Diese Arbeit erweitert diese Modelle um eine Berechnung des Gleichrichters mit Transistoren und Arbeitspunkt-Einstellung zur dynamischen Kompensation der Schwellenspannung. Speziell wird der komplexe Zusammenhang zwischen Eingangsleistung, Ausgangsspannung und Laststrom des Gleichrichters mathematisch beschrieben. Das aufgestellte Modell beschreibt den Einfluss der Parameter der verwendeten Bauelemente auf das eingangs- und ausgangsseitige Verhalten der Schaltung und erleichtert somit den systematischen Schaltungsentwurf. Es werden neue Schaltungstopologien erarbeitet. Diese Gleichrichter benötigen keine zusätzlichen Prozessschritte und erreichen dennoch eine hohe Ansprechempfindlichkeit. Im verwendeten 0,35µm Prozess wird die Sensitivität gegenüber der herkömmlichen Villard Schaltung um bis zu 5 dBm verbessert. Im Rahmen der Arbeit wurde ein ASIC (Application Specific Integrated Circuit) mit einem vollständigen analogen Front End für einen Sensor Transponder mit einer Reichweite von über 4 Metern entwickelt. Neben der Funktionalität zur Spannungsversorgung, Takterzeugung und Datenübertragung werden außerdem temperatur- und prozessstabile Referenzspannungen und eine temperaturabhängige Spannung erzeugt.Wireless energy transmission is frequently used as a power supply for transponder systems without batteries or solar cells. A base station transmits an electromagnetic field to send data and energy to one or several transponders (“tags”). Each tag typically comprises an integrated circuit and an antenna. Passive sensor transponders detect physical values such as temperature or pressure. Inductive energy transmission systems achieve only a limited range of less than one meter. In this work, UHF (Ultra High Frequency) electromagnetic waves are used for energy- and data transmission. The antenna signal is rectified to serve as a voltage supply for the chip. The power efficiency of the system is mainly determined by the free-space transmission as well as rectification losses. The amplitude of the antenna signal is very low at a large distance from the base station. Therefore, the rectifier is the critical circuit block concerning power efficiency. This work focuses on the analysis and the modelling, as well as the design of novel topologies for this circuit block. The first goal is to derive a rectifier analysis that takes into account the properties and parasitics of CMOS (Complementary Metal Oxide Semiconductor) devices. The Villard circuit with Schottky diodes has been modelled in several previous works. These models and analyses are extended to include rectifier circuits with dynamic threshold-voltage cancellation techniques. The mathematical relation between input power, output voltage and load current is derived analytically. The resulting model predicts the influence of device parameters on the input and output behaviour of the circuit. This leads to a systematic circuit design approach. Two novel circuits are presented. These rectifiers achieve a high sensitivity and not require additional masks or process modifications. All circuits were fabricated in a 0.35µm CMOS process. The sensitivity is improved by 5 dBm compared to the conventional Villard Circuit. The complete analog front-end of a passive UHF sensor transponder with a range of more than 4 m was designed and fabricated. The ASIC (Application Specific Integrated Circuit) manages data transmission, supply voltage, and clock generation. In addition to this functionality, the chip also generates temperature- and process-independent supply and reference voltages, as well as a temperature dependent sensor signal

Modelagem e projeto de conversores AC/DC de ultrabaixa tensão de operação

Tese (doutorado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Engenharia ElétricaEsta tese apresenta o desenvolvimento de um modelo analítico e muito simples do circuito retificador, considerando a lei corrente-tensão (exponencial) do diodo, tendo como mérito simplificar um problema relativamente complexo e não linear (retificador) com uma ótima precisão. O modelo mostra-se válido, mesmo para tensões abaixo da tensão térmica, tendo sido testado para um ampla variação de tensão e corrente. São apresentadas equações para a tensão DC de saída, ripple de tensão, transiente durante o startup e eficiência de conversão de potência. Para validação, o modelo é comparado à simulações realizadas em simulador SPICE e a resultados experimentais, mostrando uma ótima precisão. Comparando-se este modelo com outros citados nas referências bibliográficas, este possui a vantagem de ser analítico, mais simples e/ou mais preciso. O desenvolvimento deste modelo torna-se mais importante, à medida que cresce o interesse pela utilização de sensores remotos autoalimentados, e também pelo uso de dispositivos de identificação por rádiofrequência (RFID). O espaço de projeto do conversor AC/DC foi explorado por meio de equações simples e de uma metodologia de projeto desenvolvida para que, através de gráficos, o projetista possa de forma fácil, rápida e com boa precisão, determinar os principais elementos do conversor AC/DC e da rede de adaptação de impedâncias. Para alcançar potências menores na entrada do conversor AC/DC, a metodologia utiliza redes de adaptação de impedâncias para o casamento entre as impedâncias da antena (ou impedância da fonte geradora de sinal AC) e do conversor AC/DC. Além disso, esta metodologia pode ser utilizada para conversores AC/DC com diodos ou transistores conectados como diodos, mesmo que sua equação característica não seja a do diodo exponencial. Para a utilização do conversor AC/DC em circuitos integrados, são estudadas as possibilidades de uso do transistor MOS conectado como diodo operando na região de inversão fraca. Para obter suporte experimental, foram projetados multiplicadores de tensão, com rede de adaptação de impedâncias incorporada ao circuito integrado e também externa ao mesmo, com o objetivo de atingir a menor potência de entrada disponível.This thesis presents a simple analytical model of the rectifier circuit assuming that the diode is characterized by the exponential current-voltage law. The model shown is valid even for voltages below the thermal voltage and it has been tested for a wide range of voltages and currents. Equations are provided for the DC output voltage, ripple voltage, transient during startup and power conversion efficiency. For validation, the model is compared to simulations carried out in SPICE and experimental results, showing a good accuracy. Comparing this model with others cited in the references, this one has the advantage of being analytical, simpler, and more accurate. The development of this model becomes more relevant with the growing use of self powered remote sensors, and radio frequency identification devices (RFID). The design space of the AC/DC converter was explored using a graphic methodology. To operate with reduced power at the input, the methodology uses an impedance adaptation network for the matching between the impedances of the antenna (or the source impedance of the AC signal) and that of the AC/DC converter. Furthermore, this methodology can be used for AC/DC converters with diodes or transistors connected as diodes, even if their characteristic equations are not exponential. To obtain experimental support, voltage multipliers have been designed with impedance adaptation network incorporated into the integrated circuit and also external to it, in order to achieve the lowest possible power at the input