1,799 research outputs found

    3D advanced integration technology for heterogeneous systems

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    International audience3D integration technology is nowadays mature enough, offering today further system integration using heterogeneous technologies, with already many different industrial successes (Imagers, 2.5D Interposers, 3D Memory Cube, etc.). CEA-LETI has been developing for a decade 3D integration, and have pursued research in both directions: developing advanced 3D technology bricks (TSVs, µ-bumps, Hybrid Bonding, etc), and designing advanced 3D circuits as pioneer prototypes. In this paper, a short overview of some recent advanced 3D technology results is presented, including some latest 3D circuit's description

    Master of Science

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    thesisIntegrated circuits often consist of multiple processing elements that are regularly tiled across the two-dimensional surface of a die. This work presents the design and integration of high speed relative timed routers for asynchronous network-on-chip. It researches NoC's efficiency through simplicity by directly translating simple T-router, source-routing, single-flit packet to higher radix routers. This work is intended to study performance and power trade-offs adding higher radix routers, 3D topologies, Virtual Channels, Accurate NoC modeling, and Transmission line communication links. Routers with and without virtual channels are designed and integrated to arrayed communication networks. Furthermore, the work investigates 3D networks with diffusive RC wires and transmission lines on long wrap interconnects

    Energy autonomous systems : future trends in devices, technology, and systems

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    The rapid evolution of electronic devices since the beginning of the nanoelectronics era has brought about exceptional computational power in an ever shrinking system footprint. This has enabled among others the wealth of nomadic battery powered wireless systems (smart phones, mp3 players, GPS, …) that society currently enjoys. Emerging integration technologies enabling even smaller volumes and the associated increased functional density may bring about a new revolution in systems targeting wearable healthcare, wellness, lifestyle and industrial monitoring applications

    FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study

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    Reconfigurable computers usually provide a limited number of different memory resources, such as host memory, external memory, and on-chip memory with different capacities and communication characteristics. A key challenge for achieving high-performance with reconfigurable accelerators is the efficient utilization of the available memory resources. A detailed knowledge of the memories' parameters is key for generating an optimized communication layout. In this paper, we discuss a benchmarking environment for generating such a characterization. The environment is built on IMORC, our architectural template and on-chip network for creating reconfigurable accelerators. We provide a characterization of the memory resources available on the XtremeData XD1000 reconfigurable computer. Based on this data, we present as a case study the implementation of a 3D image compositing accelerator that is able to double the frame rate of a parallel renderer

    Implementation of the specification and schematics design for the Ethernet Fronthaul Module

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    Abstract. This Master’s Thesis covers theory and implementation of a device which is designed using a small base station as a reference. The theory chapter consists of the description and theory of a cloud radio access network architecture, a high data rate interface, an active antenna system and a designed device itself. This theory chapter is used to give reasons why the device is designed. The implementation chapter is divided into two chapters, which explains how the implementation specification is done and how the schematics were drawn. The schematics chapter covers the modifications, which are done to the hardware of the original small base station. Ethernet Fronthaul Moduulin implementointispesifikaation ja piirikaavion suunnittelu. Tiivistelmä. Tämä diplomityö käsittelee pienen tukiasemalaitteen pohjalta suunniteltavan laitteen, siihen liittyvän teorian sekä toteutuksen. Laitteeseen liittyvä teoria muodostuu neljästä kappaleesta, jotka käsittelevät cloud radio access network -arkkitehtuuria, nopean data määrän rajapintaa, aktiivi antenni systeemiä sekä itse suunnitellun laitteen teoriaa. Teorialla pyritään pohjustamaan syitä siihen, minkä vuoksi kyseinen laite on haluttu toteuttaa. Laitteen toteutusta käsittelevä kappale on jaettu kahteen osioon, joissa kuvataan implementointispesifikaation toteutus ja piirikaavioiden piirto. Piirikaavio kappaleessa käsitellään muutokset, jotka on tehty pohjana käytettävän tukiaseman laitteistolle

    Performance Comparison of Dual Connectivity and Hard Handover for LTE-5G Tight Integration in mmWave Cellular Networks

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    MmWave communications are expected to play a major role in the Fifth generation of mobile networks. They offer a potential multi-gigabit throughput and an ultra-low radio latency, but at the same time suffer from high isotropic pathloss, and a coverage area much smaller than the one of LTE macrocells. In order to address these issues, highly directional beamforming and a very high-density deployment of mmWave base stations were proposed. This Thesis aims to improve the reliability and performance of the 5G network by studying its tight and seamless integration with the current LTE cellular network. In particular, the LTE base stations can provide a coverage layer for 5G mobile terminals, because they operate on microWave frequencies, which are less sensitive to blockage and have a lower pathloss. This document is a copy of the Master's Thesis carried out by Mr. Michele Polese under the supervision of Dr. Marco Mezzavilla and Prof. Michele Zorzi. It will propose an LTE-5G tight integration architecture, based on mobile terminals' dual connectivity to LTE and 5G radio access networks, and will evaluate which are the new network procedures that will be needed to support it. Moreover, this new architecture will be implemented in the ns-3 simulator, and a thorough simulation campaign will be conducted in order to evaluate its performance, with respect to the baseline of handover between LTE and 5G.Comment: Master's Thesis carried out by Mr. Michele Polese under the supervision of Dr. Marco Mezzavilla and Prof. Michele Zorz

    Doctor of Philosophy

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    dissertationCommunication surpasses computation as the power and performance bottleneck in forthcoming exascale processors. Scaling has made transistors cheap, but on-chip wires have grown more expensive, both in terms of latency as well as energy. Therefore, the need for low energy, high performance interconnects is highly pronounced, especially for long distance communication. In this work, we examine two aspects of the global signaling problem. The first part of the thesis focuses on a high bandwidth asynchronous signaling protocol for long distance communication. Asynchrony among intellectual property (IP) cores on a chip has become necessary in a System on Chip (SoC) environment. Traditional asynchronous handshaking protocol suffers from loss of throughput due to the added latency of sending the acknowledge signal back to the sender. We demonstrate a method that supports end-to-end communication across links with arbitrarily large latency, without limiting the bandwidth, so long as line variation can be reliably controlled. We also evaluate the energy and latency improvements as a result of the design choices made available by this protocol. The use of transmission lines as a physical interconnect medium shows promise for deep submicron technologies. In our evaluations, we notice a lower energy footprint, as well as vastly reduced wire latency for transmission line interconnects. We approach this problem from two sides. Using field solvers, we investigate the physical design choices to determine the optimal way to implement these lines for a given back-end-of-line (BEOL) stack. We also approach the problem from a system designer's viewpoint, looking at ways to optimize the lines for different performance targets. This work analyzes the advantages and pitfalls of implementing asynchronous channel protocols for communication over long distances. Finally, the innovations resulting from this work are applied to a network-on-chip design example and the resulting power-performance benefits are reported

    A survey of electromagnetic influence on uavs from an ehv power converter stations and possible countermeasures

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    National Natural Science Foundation of China (Grant Nos. 11872148, U1908217, 61801034).It is inevitable that high-intensity, wide-spectrum electromagnetic emissions are generated by the power electronic equipment of the Extra High Voltage (EHV) power converter station. The surveillance flight of Unmanned Aerial Vehicles (UAVs) is thus, situated in a complex electromagnetic environment. The ubiquitous electromagnetic interference demands higher electromagnetic protection requirements from the UAV construction and operation. This article is related to the UAVs patrol inspections of the power line in the vicinity of the EHV converter station. The article analyzes the electromagnetic interference characteristics of the converter station equipment in the surrounding space and the impact of the electromagnetic emission on the communication circuits of the UAV. The anti-electromagnetic interference countermeasures strive to eliminate or reduce the threats of electromagnetic emissions on the UAV’s hardware and its communication network.publishersversionpublishe
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