Electronic dispersion precompensation of direct-detected NRZ using analog filtering

We demonstrate (in real-time) electrical dispersion compensation in direct detection links using analog transmit side filtering techniques. By this means, we extend the fiber reach using a low complexity solution while avoiding digital preprocessing and digital-to-analog converters (DACs) which are commonly used nowadays. Modulation is done using an IQ MachZehnder modulator (MZM) which allows straightforward compensation of the complex impulse response caused by chromatic dispersion in the fiber. A SiGe BiCMOS 5-tap analog complex finite impulse response (FIR) filter chip and/or a delay between both driving signals of the MZMs is proposed for the filter implementation. Several link experiments are conducted in C-band where transmission up to 60 km of standard single-mode fiber (SSMF) of direct detected 28Gb/s NRZ/OOK is demonstrated. The presented technique can be used in applications where low power consumption is critical

CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s

A digital transmitter pre-emphasis technique is presented that is based on pulse-width modulation, instead of finite impulse response (FIR) filtering. The technique fits well to future high-speed low-voltage CMOS processes. A 0.13 /spl mu/m CMOS transmitter achieves more than 5 Gb/s (2-PAM) over 25 m of standard RG-58U low-end coaxial copper cable. The test chip compensates for up to 33 dB of channel loss at the fundamental signaling frequency (2.5 GHz), which is the highest figure compared to literature

Design and analysis of a control system for an optical delay-line circuit used as reconfigurable gain equalizer

The design and analysis of a control system for a coherent two-port lattice-form optical delay-line circuit used as reconfigurable gain equalizer is presented. The design of the control system, which is based on a real device model and a least-square optimization method, is described in detail. Analysis on a five-stage device for the 32 possible solutions of phase parameters showed that, for some filter characteristics, the variations in power dissipation can vary up to a factor of 2. Furthermore, the solution selection has influence on the optimization result and number of iterations needed. A sensitivity analysis of the phase parameters showed that the allowable error in the phase parameters should not exceed a standard deviation of /spl pi//500 in order to achieve a total maximal absolute accuracy error not greater than approximately 0.6 dB. A five-stage device has been fabricated using planar lightwave circuit technology that uses the thermooptic effect. Excellent agreement between simulations and measurements has been achieved

Wideband Time-Domain Digital Backpropagation via Subband Processing and Deep Learning

We propose a low-complexity sub-banded DSP architecture for digital backpropagation where the walk-off effect is compensated using simple delay elements. For a simulated 96-Gbaud signal and 2500 km optical link, our method achieves a 2.8 dB SNR improvement over linear equalization.Comment: 3 pages, 3 figur

Digital filter design using root moments for sum-of-all-pass structures from complete and partial specifications

Published versio

Analog I/Q FIR filter in 55-nm SiGe BiCMOS for 16-QAM optical communications at 112 Gb/s

We propose a novel implementation of a complex analog equalization filter for the compensation of frequency-dependent variations in coherent optical links. The analog compensation filter can be used in coherent-lite optical communication links where digital signal processing (DSP) is removed to limit the complexity and power consumption. In these links, the filter can compensate for electrical bandwidth limitations and distortion introduced by chromatic dispersion in the fiber. The complex filter is implemented by combining four distributed analog finite-impulse response (FIR) filters to obtain the necessary response. The filter delays are implemented using active delay cell structures to create a compact solution. The analog filter is implemented in a 55-nm BiCMOS technology and consumes 185-mW core power for five complex filter taps. Performance is evaluated using the S-parameter measurements, noise and linearity measurements, and real-time system experiments using 112-Gb/s 16-QAM-modulated signals