5 research outputs found

    Rail-to-rail class AB CMOS tunable transconductor with -52dB IM3 at 1MHz

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    A novel CMOS tunable transconductor is presented. The circuit operates in classAB hence featuring power efficiency. The internal feedback employed and the use of a linearized triode transistor for voltage-to-current conversion allows achieving high linearity. Rail-to-rail input range is obtained by using floatinggate transistors. Measurement results for a test chip prototype in a 0.5”m standard CMOS process show an IM3 of -52.13dB at 1MHz for a 2Vpp input and a power consumption of 2.2mW

    CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency

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    A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm 2 Si area. It has 0.38-mW power consumption in strong inversion with ±0.6-V power supplies. In subthreshold, it has 0.64-ΌW quiescent power and operates with ±200-mV dc supplies. Miller multiplication is used to obtain a large equivalent capacitor without excessive Si area. By varying the gain of the Miller amplifier, the pole frequency can be varied from 2 to 48 Hz. Experimental and simulation results of a test chip prototype in 130-nm CMOS technology validate the proposed circuit

    Low Voltage Low Power Analogue Circuits Design

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    DisertačnĂ­ prĂĄce je zaměƙena na vĂœzkum nejbÄ›ĆŸnějĆĄĂ­ch metod, kterĂ© se vyuĆŸĂ­vajĂ­ pƙi nĂĄvrhu analogovĂœch obvodĆŻ s vyuĆŸitĂ­ nĂ­zkonapěƄovĂœch (LV) a nĂ­zkopƙíkonovĂœch (LP) struktur. Tyto LV LP obvody mohou bĂœt vytvoƙeny dĂ­ky vyspělĂœm technologiĂ­m nebo takĂ© vyuĆŸitĂ­m pokročilĂœch technik nĂĄvrhu. DisertačnĂ­ prĂĄce se zabĂœvĂĄ prĂĄvě pokročilĂœmi technikami nĂĄvrhu, pƙedevĆĄĂ­m pak nekonvenčnĂ­mi. Mezi tyto techniky patƙí vyuĆŸitĂ­ prvkĆŻ s ƙízenĂœm substrĂĄtem (bulk-driven - BD), s plovoucĂ­m hradlem (floating-gate - FG), s kvazi plovoucĂ­m hradlem (quasi-floating-gate - QFG), s ƙízenĂœm substrĂĄtem s plovoucĂ­m hradlem (bulk-driven floating-gate - BD-FG) a s ƙízenĂœm substrĂĄtem s kvazi plovoucĂ­m hradlem (quasi-floating-gate - BD-QFG). PrĂĄce je takĂ© orientovĂĄna na moĆŸnĂ© zpĆŻsoby implementace znĂĄmĂœch a modernĂ­ch aktivnĂ­ch prvkĆŻ pracujĂ­cĂ­ch v napěƄovĂ©m, proudovĂ©m nebo mix-mĂłdu. Mezi tyto prvky lze začlenit zesilovače typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za Ășčelem potvrzenĂ­ funkčnosti a chovĂĄnĂ­ vĂœĆĄe zmĂ­něnĂœch struktur a prvkĆŻ byly vytvoƙeny pƙíklady aplikacĂ­, kterĂ© simulujĂ­ usměrƈovacĂ­ a induktančnĂ­ vlastnosti diody, dĂĄle pak filtry dolnĂ­ propusti, pĂĄsmovĂ© propusti a takĂ© univerzĂĄlnĂ­ filtry. VĆĄechny aktivnĂ­ prvky a pƙíklady aplikacĂ­ byly ověƙeny pomocĂ­ PSpice simulacĂ­ s vyuĆŸitĂ­m parametrĆŻ technologie 0,18 m TSMC CMOS. Pro ilustraci pƙesnĂ©ho a ĂșčinnĂ©ho chovĂĄnĂ­ struktur je v disertačnĂ­ prĂĄci zahrnuto velkĂ© mnoĆŸstvĂ­ simulačnĂ­ch vĂœsledkĆŻ.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the non–conventional ones which are bulk–driven (BD), floating–gate (FG), quasi–floating–gate (QFG), bulk–driven floating–gate (BD–FG) and bulk–driven quasi–floating–gate (BD–QFG) techniques. The thesis also looks at ways of implementing structures of well–known and modern active elements operating in voltage–, current–, and mixed–mode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fully–differential second generation current conveyor (FB–CCII), fully–balanced differential difference amplifier (FB–DDA), voltage differencing transconductance amplifier (VDTA), current–controlled current differencing buffered amplifier (CC–CDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diode–less rectifier and inductance simulations, as well as low–pass, band–pass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.
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