Supplementary Inductance Simulator Topologies Employing Single DXCCII

In this study, six grounded inductance simulator circuits are presented including additional useful features in comparison to previous dual-X current conveyor (DXCCII) based implementations. To demonstrate the performance and usefulness of the presented circuits, one of them is used to construct a fifth order Butterworth high-pass filter and a current-mode multifunction filter as application examples. Simulation results are given to confirm the theoretical analysis. The derived DXCCII and its applications are simulated using CMOS 0.35 μm technology

Novel Floating General Element Simulators Using CBTA

In this study, a novel floating frequency dependent negative resistor (FDNR), floating inductor, floating capacitor and floating resistor simulator circuit employing two CBTAs and three passive components is proposed. The presented circuit can realize floating FDNR, inductor, capacitor or resistor depending on the passive component selection. Since the passive elements are all grounded, this circuit is suitable for fully integrated circuit design. The circuit does not require any component matching conditions, and it has a good sensitivity performance with respect to tracking errors. Moreover, the proposed FDNR, inductance, capacitor and resistor simulator can be tuned electronically by changing the biasing current of the CBTA or can be controlled through the grounded resistor or capacitor. The high-order frequency dependent element simulator circuit is also presented. Depending on the passive component selection, it realizes high-order floating circuit defining as V(s) = snAI(s) or V(s) = s-nBI(s). The proposed floating FDNR simulator circuit and floating high-order frequency dependent element simulator circuit are demonstrated by using PSPICE simulation for 0.25 μm, level 7, TSMC CMOS technology parameters

Electronically Tunable Current-mode High-order Ladder Low-pass Filters Based on CMOS Technology

This paper describes the design of current mode low-pass ladder filters based on CMOS technology. The filters are derived from passive RLC ladder filter prototypes using new CMOS lossy and lossless integrators. The all-pole and Elliptic approximations are used in the proposed low-pass filter realizations. The proposed two types of filter can be electronically tuned between 10kHz and 100MHz through bias current from 0.03µA to 300µA. The proposed filters use 1.5 V power supply with 3 mW power consumption at 300 µA bias current. The proposed filters are resistorless, use grounded capacitors and are suitable for further integration. The total harmonic distortion (THD) of the low-pass filters is less than 1% over the operating frequency range. PSPICE simulation results, obtained by using TSMC 0.18µm technology, confirm the presented theory

Current and Voltage Mode Multiphase Sinusoidal Oscillators Using CBTAs

Current-mode (CM) and voltage-mode (VM) multiphase sinusoidal oscillator (MSO) structures using current backward transconductance amplifier (CBTA) are proposed. The proposed oscillators can generate n current or voltage signals (n being even or odd) equally spaced in phase. n+1 CBTAs, n grounded capacitors and a grounded resistor are used for nth-state oscillator. The oscillation frequency can be independently controlled through transconductance (gm) of the CBTAs which are adjustable via their bias currents. The effects caused by the non-ideality of the CBTA on the oscillation frequency and condition have been analyzed. The performance of the proposed circuits is demonstrated on third-stage and fifth-stage MSOs by using PSPICE simulations based on the 0.25 µm TSMC level-7 CMOS technology parameters

An Analogue Front-End System with a Low-Power On-Chip Filter and ADC for Portable ECG Detection Devices

Medical diagnostic instruments can be made into portable devices for the purpose of home care, such as the diagnosis of heart disease. These assisting devices are not only used to monitor patients but are also beneficial as handy and convenient medical instruments. Hence, for reasons of both portability and durability, designers should reduce the power consumption of assistant devices as much as possible to extend their battery lifetime. However, achieving the low power requirement of the ECG sensing and the processing board for the ECG with commercial discrete components (A21-0003) is difficult because the low power consumer electronics for ECG acquisition systems are not yet available. With the help of the integrated circuit technology, the power-saving requirement of portable and durable equipment gives circuit designers the impetus to reduce the power consumption of analogue front-end circuits in ECG acquisition systems. In addition, the analogue front-end circuits, which are the interface between physical signals and the digital processor, must be operated at a low-supply voltage to be integrated into the low-voltage system-on-a-chip (SOC) system (Eshraghian, 2006). Therefore, the chapter will present two design examples of low-voltage (1 V) and low-power (<1 W) on-chip circuits including a low-pass filter (LPF) and an analogue-to-digital converter (ADC) to demonstrate the possibility of developing the low-voltage low-power ECG acquisition SO

High frequency and high dynamic range continuous time filters

Many modern communication systems use orthogonal frequency division multiplexing (OFDM) and discrete multi-tone (DMT) as modulation schemes where high data rates are transmitted over a wide frequency band in multiple orthogonal subcarriers. Due to the many advantages, such as flexibility, good noise immunity and the ability to be optimized for medium conditions, the use of DMT and OFDM can be found in digital video broadcasting, local area wireless network (IEEE 802.11a), asymmetric digital subscriber line (ADSL), very high bit rate DSL (VDSL) and power line communications (PLC). However, a major challenge is the design of the analog frontend; for these systems a large dynamic range is required due to the significant peak to average ratio of the resulting signals. In receivers, very demanding high-performance analog filters are typically used to block interferers and provide anti-aliasing before the subsequent analog to digital conversion stage. For frequencies higher than 10MHz, Gm-C filter implementations are generally preferred due to the more efficient operation of wide-band operational transconductance amplifiers (OTA). Nevertheless, the inherent low-linearity of open-loop operated OTA limits the dynamic range. In this dissertation, three different proposed OTA linearity enhancement techniques for the design of high frequency and high dynamic range are presented. The techniques are applied to two filter implementations: a 20MHz second order tunable filter and a 30MHz fifth order elliptical low-pass filter. Simulation and experimental results show a spurious free dynamic range (SFDR) of 65dB with a power consumption of 85mW. In a figure of merit where SFDR is normalized to the power consumption, this filter is 6dB above the trend-line of recently reported continuous time filters

A special issue on low - voltage low - power analog devices and their applications

It is well known that there is an increasing trend on the design of low-voltage low-power circuits due to the requirement of efficient portable electronic systems with long battery lifetime. For analog circuits, higher biasing current is needed to obtain the same performance with low supply voltages which, however, results in increasing the power consumption. On the other hand, lower biasing current restricts the dynamic range of the circuit, whereas with low supply voltages it is hard to keep all the transistors in saturation region. Thus, design techniques for low-voltage low-power operation are very important for analog circuit designers. In this Special Issue we deal with low-voltage low-power analog devices and their application