Two-Dimensional Spintronic Circuit Architectures on Large Scale Graphene

Solid-state electronics based on utilizing the electron spin degree of freedom for storing and processing information can pave the way for next-generation spin-based computing. However, the realization of spin communication between multiple devices in complex spin circuit geometries, essential for practical applications, is still lacking. Here, we demonstrate the spin current propagation in two-dimensional (2D) circuit architectures consisting of multiple devices and configurations using a large area CVD graphene on SiO2/Si substrate at room temperature. Taking advantage of the significant spin transport distance reaching 34 {\mu}m in commercially available wafer-scale graphene grown on Cu foil, we demonstrate that the spin current can be effectively communicated between the magnetic memory elements in graphene channels within 2D circuits of Y-junction and Hexa-arm architectures. We further show that by designing graphene channels and ferromagnetic elements at different geometrical angles, the symmetric and antisymmetric components of the Hanle spin precession signal can be remarkably controlled. These findings lay the foundation for the design of complex 2D spintronic circuits, which can be integrated into efficient electronics based on the transport of pure spin currents

A Scalable Correlator Architecture Based on Modular FPGA Hardware, Reuseable Gateware, and Data Packetization

A new generation of radio telescopes is achieving unprecedented levels of sensitivity and resolution, as well as increased agility and field-of-view, by employing high-performance digital signal processing hardware to phase and correlate large numbers of antennas. The computational demands of these imaging systems scale in proportion to BMN^2, where B is the signal bandwidth, M is the number of independent beams, and N is the number of antennas. The specifications of many new arrays lead to demands in excess of tens of PetaOps per second. To meet this challenge, we have developed a general purpose correlator architecture using standard 10-Gbit Ethernet switches to pass data between flexible hardware modules containing Field Programmable Gate Array (FPGA) chips. These chips are programmed using open-source signal processing libraries we have developed to be flexible, scalable, and chip-independent. This work reduces the time and cost of implementing a wide range of signal processing systems, with correlators foremost among them,and facilitates upgrading to new generations of processing technology. We present several correlator deployments, including a 16-antenna, 200-MHz bandwidth, 4-bit, full Stokes parameter application deployed on the Precision Array for Probing the Epoch of Reionization.Comment: Accepted to Publications of the Astronomy Society of the Pacific. 31 pages. v2: corrected typo, v3: corrected Fig. 1

A programmable, multi-format photonic transceiver platform enabling flexible optical networks

Development of programmable photonic devices for future flexible optical networks is ongoing. To this end, an innovative, multi-format QAM transmitter design is presented. It comprises a segmented-electrode InP IQ-MZM to be fabricated in InP, which can be directly driven by low-power CMOS logic. Arbitrary optical QAM format generation is made possible using only binary electrical signals, without the need for high-performance DACs and high-swing linear drivers. The concept enables a host of Tx-side DSP functionality, including the spectral shaping needed for Nyquist-WDM system concepts. In addition, we report on the development of an optical channel MUX/DEMUX, based on arrays of microresonator filters with reconfigurable bandwidths and center wavelengths. The device is intended for operation with multi-format flexible transceivers, enabling Dense (D)WDM superchannel aggregation and arbitrary spectral slicing in the context of a flexible grid environment

Survey of Inter-satellite Communication for Small Satellite Systems: Physical Layer to Network Layer View

Small satellite systems enable whole new class of missions for navigation, communications, remote sensing and scientific research for both civilian and military purposes. As individual spacecraft are limited by the size, mass and power constraints, mass-produced small satellites in large constellations or clusters could be useful in many science missions such as gravity mapping, tracking of forest fires, finding water resources, etc. Constellation of satellites provide improved spatial and temporal resolution of the target. Small satellite constellations contribute innovative applications by replacing a single asset with several very capable spacecraft which opens the door to new applications. With increasing levels of autonomy, there will be a need for remote communication networks to enable communication between spacecraft. These space based networks will need to configure and maintain dynamic routes, manage intermediate nodes, and reconfigure themselves to achieve mission objectives. Hence, inter-satellite communication is a key aspect when satellites fly in formation. In this paper, we present the various researches being conducted in the small satellite community for implementing inter-satellite communications based on the Open System Interconnection (OSI) model. This paper also reviews the various design parameters applicable to the first three layers of the OSI model, i.e., physical, data link and network layer. Based on the survey, we also present a comprehensive list of design parameters useful for achieving inter-satellite communications for multiple small satellite missions. Specific topics include proposed solutions for some of the challenges faced by small satellite systems, enabling operations using a network of small satellites, and some examples of small satellite missions involving formation flying aspects.Comment: 51 pages, 21 Figures, 11 Tables, accepted in IEEE Communications Surveys and Tutorial