Co-designing reliability and performance for datacenter memory

Memory is one of the key components that affects reliability and performance of datacenter servers. Memory in today’s servers is organized and shared in several ways to provide the most performant and efficient access to data. For example, cache hierarchy in multi-core chips to reduce access latency, non-uniform memory access (NUMA) in multi-socket servers to improve scalability, disaggregation to increase memory capacity. In all these organizations, hardware coherence protocols are used to maintain memory consistency of this shared memory and implicitly move data to the requesting cores. This thesis aims to provide fault-tolerance against newer models of failure in the organization of memory in datacenter servers. While designing for improved reliability, this thesis explores solutions that can also enhance performance of applications. The solutions build over modern coherence protocols to achieve these properties. First, we observe that DRAM memory system failure rates have increased, demanding stronger forms of memory reliability. To combat this, the thesis proposes Dvé, a hardware driven replication mechanism where data blocks are replicated across two different memory controllers in a cache-coherent NUMA system. Data blocks are accompanied by a code with strong error detection capabilities so that when an error is detected, correction is performed using the replica. Dvé’s organization offers two independent points of access to data which enables: (a) strong error correction that can recover from a range of faults affecting any of the components in the memory and (b) higher performance by providing another nearer point of memory access. Dvé’s coherent replication keeps the replicas in sync for reliability and also provides coherent access to read replicas during fault-free operation for improved performance. Dvé can flexibly provide these benefits on-demand at runtime. Next, we observe that the coherence protocol itself requires to be hardened against failures. Memory in datacenter servers is being disaggregated from the compute servers into dedicated memory servers, driven by standards like CXL. CXL specifies the coherence protocol semantics for compute servers to access and cache data from a shared region in the disaggregated memory. However, the CXL specification lacks the requisite level of fault-tolerance necessary to operate at an inter-server scale within the datacenter. Compute servers can fail or be unresponsive in the datacenter and therefore, it is important that the coherence protocol remain available in the presence of such failures. The thesis proposes Āpta, a CXL-based, shared disaggregated memory system for keeping the cached data consistent without compromising availability in the face of compute server failures. Āpta architects a high-performance fault-tolerant object-granular memory server that significantly improves performance for stateless function-as-a-service (FaaS) datacenter applications

Fault and Defect Tolerant Computer Architectures: Reliable Computing With Unreliable Devices

This research addresses design of a reliable computer from unreliable device technologies. A system architecture is developed for a fault and defect tolerant (FDT) computer. Trade-offs between different techniques are studied and yield and hardware cost models are developed. Fault and defect tolerant designs are created for the processor and the cache memory. Simulation results for the content-addressable memory (CAM)-based cache show 90% yield with device failure probabilities of 3 x 10(-6), three orders of magnitude better than non fault tolerant caches of the same size. The entire processor achieves 70% yield with device failure probabilities exceeding 10(-6). The required hardware redundancy is approximately 15 times that of a non-fault tolerant design. While larger than current FT designs, this architecture allows the use of devices much more likely to fail than silicon CMOS. As part of model development, an improved model is derived for NAND Multiplexing. The model is the first accurate model for small and medium amounts of redundancy. Previous models are extended to account for dependence between the inputs and produce more accurate results

Microarchitectural Techniques to Exploit Repetitive Computations and Values

La dependencia de datos es una de las principales razones que limitan el rendimiento de los procesadores actuales. Algunos estudios han demostrado, que las aplicaciones no pueden alcanzar más de una decena de instrucciones por ciclo en un procesador ideal, con la simple limitación de las dependencias de datos. Esto sugiere que, desarrollar técnicas que eviten la serialización causada por ellas, son importantes para acelerar el paralelismo a nivel de instrucción y será crucial en los microprocesadores del futuro.Además, la innovación y las mejoras tecnológicas en el diseño de los procesadores de los últimos diez años han sobrepasado los avances en el diseño del sistema de memoria. Por lo tanto, la cada vez mas grande diferencia de velocidades de procesador y memoria, ha motivado que, los actuales procesadores de alto rendimiento se centren en las organizaciones cache para tolerar las altas latencias de memoria. Las memorias cache solventan en parte esta diferencia de velocidades, pero a cambio introducen un aumento de área del procesador, un incremento del consumo energético y una mayor demanda de ancho de banda de memoria, de manera que pueden llegar a limitar el rendimiento del procesador.En esta tesis se proponen diversas técnicas microarquitectónicas que pueden aplicarse en diversas partes del procesador, tanto para mejorar el sistema de memoria, como para acelerar la ejecución de instrucciones. Algunas de ellas intentan suavizar la diferencia de velocidades entre el procesador y el sistema de memoria, mientras que otras intentan aliviar la serialización causada por las dependencias de datos. La idea fundamental, tras todas las técnicas propuestas, consiste en aprovechar el alto porcentaje de repetición de los programas convencionales.Las instrucciones ejecutadas por los programas de hoy en día, tienden a ser repetitivas, en el sentido que, muchos de los datos consumidos y producidos por ellas son frecuentemente los mismos. Esta tesis denomina la repetición de cualquier valor fuente y destino como Repetición de Valores, mientras que la repetición de valores fuente y operación de la instrucción se distingue como Repetición de Computaciones. De manera particular, las técnicas propuestas para mejorar el sistema de memoria se basan en explotar la repetición de valores producida por las instrucciones de almacenamiento, mientras que las técnicas propuestas para acelerar la ejecución de instrucciones, aprovechan la repetición de computaciones producida por todas las instrucciones.Data dependences are some of the most important hurdles that limit the performance of current microprocessors. Some studies have shown that some applications cannot achieve more than a few tens of instructions per cycle in an ideal processor with the sole limitation of data dependences. This suggests that techniques for avoiding the serialization caused by them are important for boosting the instruction-level parallelism and will be crucial for future microprocessors. Moreover, innovation and technological improvements in processor design have outpaced advances in memory design in the last ten years. Therefore, the increasing gap between processor and memory speeds has motivated that current high performance processors focus on cache memory organizations to tolerate growing memory latencies. Caches attempt to bridge this gap but do so at the expense of large amounts of die area, increment of the energy consumption and higher demand of memory bandwidth that can be progressively a greater limit to high performance.We propose several microarchitectural techniques that can be applied to various parts of current microprocessor designs to improve the memory system and to boost the execution of instructions. Some techniques attempt to ease the gap between processor and memory speeds, while the others attempt to alleviate the serialization caused by data dependences. The underlying aim behind all the proposed microarchitectural techniques is to exploit the repetitive behaviour in conventional programs. Instructions executed by real-world programs tend to be repetitious, in the sense that most of the data consumed and produced by several dynamic instructions are often the same. We refer to the repetition of any source or result value as Value Repetition and the repetition of source values and operation as Computation Repetition. In particular, the techniques proposed for improving the memory system are based on exploiting the value repetition produced by store instructions, while the techniques proposed for boosting the execution of instructions are based on exploiting the computation repetition produced by all the instructions

Integrated shared-memory and message-passing communication in the Alewife multiprocessor

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.Includes bibliographical references (p. 237-246) and index.by John David Kubiatowicz.Ph.D

Evidence-based Cybersecurity: Data-driven and Abstract Models

Achieving computer security requires both rigorous empirical measurement and models to understand cybersecurity phenomena and the effectiveness of defenses and interventions. To address the growing scale of cyber-insecurity, my approach to protecting users employs principled and rigorous measurements and models. In this dissertation, I examine four cybersecurity phenomena. I show that data-driven and abstract modeling can reveal surprising conclusions about longterm, persistent problems, like spam and malware, and growing threats like data-breaches and cyber conflict. I present two data-driven statistical models and two abstract models. Both of the data-driven models show that the presence of heavy-tailed distributions can make naive analysis of trends and interventions misleading. First, I examine ten years of publicly reported data breaches and find that there has been no increase in size or frequency. I also find that reported and perceived increases can be explained by the heavy-tailed nature of breaches. In the second data-driven model, I examine a large spam dataset, analyzing spam concentrations across Internet Service Providers. Again, I find that the heavy-tailed nature of spam concentrations complicates analysis. Using appropriate statistical methods, I identify unique risk factors with significant impact on local spam levels. I then use the model to estimate the effect of historical botnet takedowns and find they are frequently ineffective at reducing global spam concentrations and have highly variable local effects. Abstract models are an important tool when data are unavailable. Even without data, I evaluate both known and hypothesized interventions used by search providers to protect users from malicious websites. I present a Markov model of malware spread and study the effect of two potential interventions: blacklisting and depreferencing. I find that heavy-tailed traffic distributions obscure the effects of interventions, but with my abstract model, I showed that lowering search rankings is a viable alternative to blacklisting infected pages. Finally, I study how game-theoretic models can help clarify strategic decisions in cyber-conflict. I find that, in some circumstances, improving the attribution ability of adversaries may decrease the likelihood of escalating cyber conflict

Jacques Milet's Destruction de Troie la Grant: Reassessing French Theatre in the Late Medieval Period

Jacques Milet's nearly 30,000-line French mystery play, Istoire de la Destruction de Troie la Grant [Story of the Destruction of Troy the Great], written in 1450, has been marginalized by theatre historians despite its 13 manuscripts (some with extensive illustrations) and 13 print editions dating until the mid-sixteenth century. As a play that treated its non-religious subject seriously, Destruction de Troie neither fits precisely with the spectacular religious cycles, nor with late medieval moralities and comedies, all genres which grew in popularity during the late fifteenth and early sixteenth centuries.However, Destruction de Troie's subject, the "matter of Troy," situates the play in the mainstream of the fictional universes appropriated by a range of groups--including sovereigns and their courts, civic guilds, and artists and writers of all varieties--for social and political purposes. And, the long list of surviving copies demonstrates how effectively the play captured the spirit of its time. Consequently, this dissertation uses Destruction de Troie as a prism through which to view the connections among political, economic, and social events, performance varieties and practices, and circulating literary and ideological concepts. Although much of direct evidence for performance remains inconclusive, the strength of the correspondence between the performance forms, tastes, and customs near the places where Destruction de Troie originated and circulated, and the traces of those practices in the text and images of various extant copies, supports the idea that the play was much more representative of the broader performance and literary cultures dominant at the time. The play's particular attention to political matters as demonstrated in its Épître épilogative [Letter of Epilogue], as well as the ideological orientation of the play's Prologue, reinforce the important relationship of performance to power. Viewed from this vantage point, a more complete picture of the culture emerges than that seen from the perspective of a few spectacular Passion-play performances and late medieval comedies. By establishing relationships in, around, and through Milet's dramatization, this dissertation argues that Destruction de Troie, far from being an exception, is in fact emblematic of trends in performance and culture in late medieval France

Aesthetes, English professors, and socialists : the British reception of Matthew Arnold (1888-1948)

SIGLEAvailable from British Library Document Supply Centre- DSC:D90316 / BLDSC - British Library Document Supply CentreGBUnited Kingdo

The Progress of Error: or, the Recursive Eighteenth Century

Digital archives of early modern printed materials—on Early English Books Online, Eighteenth-Century Collections Online, Google Books, and Project Gutenberg, among others—are rife with scanning errors, incomplete metadata, typos, and other odd, frustrating artifacts of mediation. Each technological change in writing brings its own version of problems in preserving and mediating our print history—problems which may, paradoxically, proliferate errors as they seek to correct prior mistakes. “The Progress of Error” traces a history of these fractious, recursive, debates about error correction and mediation in the late seventeenth and early eighteenth centuries, when editors, printers, and critics squabbled over the best means of preserving classical texts, Shakespeare, Milton, and early English ballads. I argue that the literary past is literally made of mistakes and attempts to correct them which go out of control; these errant corrections are not to be fixed in future editions but rather are constitutive of Enlightenment concepts of mediation, criticism, sensory perception, historicity, and agency. Editor and satirist Alexander Pope played both sides of the error correction and creation game, translating and editing texts at the same time as he reveled in satire’s distorting lens and its potential for correcting others’ moral and intellectual failings. Classical editor Richard Bentley, a target of Pope’s scourge in the first edition of the Dunciad, practiced extraordinary editorial hubris in insisting that he could conjecturally correct not just typos in Milton’s epic poem Paradise Lost, but entire lines that he felt were blots on the poem’s design and style. Lewis Theobald followed Bentley’s intellectually provocative but over-reaching, bombastic style when he turned his scrutiny onto Pope’s editorial methods: his Shakespeare Restor’d was a method composed of broken lines and phrases as he animadverted on his rival’s work. Less sharp-tongued but even more ambitious, Thomas Percy undertook a gigantic editorial vision of composing a world history of poetry in his Reliques of Ancient English Poetry and related editorial projects, many of which were left unfinished: a hodgepodge of misprisioned scale and poetic scope. Correction’s effects thus extended beyond fixing a particular error in a poem or play; the protocols engendered new technologies of social behavior in print and new forms of mediating agency. I am fascinated by those printer’s errors and scanning glitches, those moments when mediation goes awry. Following Marshall McLuhan, media historians Jay David Bolter and Richard Grusin have used the term “remediation” to consider how digital technology refashions media across forms and genres. With McLuhan’s background in early modern literary criticism in mind, I adapt the term for the study of print technology. I fold in related meanings of remediation—to remedy a mistake, to intervene in a situation, to renovate a landscape—to describe an emergence of literary effects generated by the iterative interventions of textual error correction. I pay attention to editors’ critical vocabularies of mediating conjectures, surveying prospects, and sifting through reams of information. The same debates about errors in perception and transmission of knowledge which engaged Enlightenment philosophers such as Francis Bacon, George Berkeley and John Locke took place on the margins of pages as editors debated how to use these new tools of mediation. My dissertation historicizes and breaks down these protocols and interactions into their smallest radical units—errors—with the goal of theorizing how these procedures have come to constitute both objects of study and critical practices in the field of literary study. It is a meta-reflective experiment in mediating among fields of book history, media theory, experimental poetics and digital art, and disciplinary histories to ask questions about where we may go next