Simplified ordering for fixed-complexity sphere decoder

This paper proposes a simplified ordering algorithm for the fixed-complexity sphere decoder (FSD). The new algorithm is developed from the analysis of the ordering for FSD from a geometrical point of view. Computer simulation is used to assess the improvements in bit-error rate (BER) performances of MIMO systems using the FSD with the original and the simplified ordering. Simulation results show that the new ordering method can achieve nearly the same BER as the original ordering method but with much less complexity. Copyright © 2010 ACM.postprintThe 6th International Wireless Communications and Mobile Computing Conference (IWCMC 2010), Caen, France, 28 June-2 July 2010. In Proceedings of the 6th International Wireless Communications and Mobile Computing Conference, 2010, p. 804-80

An efficient GPU implementation of fixed-complexity sphere decoders for MIMO wireless systems

The use of many-core processors such as general purpose Graphic Processing Units (GPUs) has recently become attractive for the efficient implementation of signal processing algorithms for communication systems. This is due to the cost-effectiveness of GPUs together with their potential capability of parallel processing. This paper presents an implementation of the widely employed fixed-complexity sphere decoder on GPUs, which allows to considerably decrease the computational time required for the data detection stage in multiple-input multiple-output systems. Both, the hard-and soft-output versions of the method have been implemented. Speedup results show the proposed GPU implementation boosts the runtime of the parallel execution of the methods in a high performance multi-core CPU. In addition, the throughput of the algorithm is evaluated and is shown to outperform other recent implementations and to fulfill the real-time requirements of several LTE configurations. ©2012-IOS Press and the authors. All rights reserved.This work was partially funded by the TEC2009-13741 project of the Spanish Ministry of Science and by the PROMETEO/2009/013 project of the Generalitat Valenciana.Roger Varea, S.; Ramiro Sánchez, C.; González Salvador, A.; Almenar Terré, V.; Vidal Maciá, AM. (2012). An efficient GPU implementation of fixed-complexity sphere decoders for MIMO wireless systems. Integrated Computer-Aided Engineering. 19(4):341-350. https://doi.org/10.3233/ICA-2012-0410S34135019

A Novel VLSI Architecture of Fixed-complexity Sphere Decoder

Fixed-complexity Sphere Decoder (FSD) is a recently proposed technique for Multiple-Input Multiple-Output (MIMO) detection. It has several outstanding features such as constant throughput and large potential parallelism, which makes it suitable for efficient VLSI implementation. However, to our best knowledge, no VLSI implementation of FSD has been reported in the literature, although some FPGA prototypes of FSD with pipeline architecture have been developed. These solutions achieve very high throughput but at very high cost of hardware resources, making them impractical in real applications. In this paper, we present a novel four-nodes-per-cycle parallel architecture of FSD, with a breadth-first processing that allows for short critical path. The implementation achieves a throughput of 213.3 Mbps at 400 MHz clock frequency, at a cost of 0.18 mm2 Silicon area on 0.13{\mu}m CMOS technology. The proposed solution is much more economical compared with the existing FPGA implementations, and very suitable for practicl applications because of its balanced performance and hardware-complexity; moreover it has the flexibility to be expanded into an eight-nodes-per-cycle version in order to double the throughput.Comment: 8 pages, this paper has been accepted by the conference DSD 201

Efficient VLSI Implementation of Soft-input Soft-output Fixed-complexity Sphere Decoder

Fixed-complexity sphere decoder (FSD) is one of the most promising techniques for the implementation of multipleinput multiple-output (MIMO) detection, with relevant advantages in terms of constant throughput and high flexibility of parallel architecture. The reported works on FSD are mainly based on software level simulations and a few details have been provided on hardware implementation. The authors present the study based on a four-nodes-per-cycle parallel FSD architecture with several examples of VLSI implementation in 4 × 4 systems with both 16-quadrature amplitude modulation (QAM) and 64-QAM modulation and both real and complex signal models. The implementation aspects and details of the architecture are analysed in order to provide a variety of performance-complexity trade-offs. The authors also provide a parallel implementation of loglikelihood- ratio (LLR) generator with optimised algorithm to enhance the proposed FSD architecture to be a soft-input softoutput (SISO) MIMO detector. To the authors best knowledge, this is the first complete VLSI implementation of an FSD based SISO MIMO detector. The implementation results show that the proposed SISO FSD architecture is highly efficient and flexible, making it very suitable for real application

Low-Complexity Near-Optimal Detection Algorithms for MIMO Systems

As the number of subscribers in wireless networks and their demanding data rate are exponentially increasing, multiple-input multiple-output (MIMO) systems have been scaled up in the 5G where tens to hundreds of antennas are deployed at base stations (BSs). However, by scaling up the MIMO systems, designing detectors with low computational complexity and close to the optimal error performance becomes challenging. In this dissertation, we study the problem of efficient detector designs for MIMO systems. In Chapter 2, we propose efficient detection algorithms for small and moderate MIMO systems by using lattice reduction and subspace (or conditional) detection techniques. The proposed algorithms exhibit full receive diversity and approach the bit error rate (BER) of the optimal maximum likelihood (ML) solution. For quasi-static channels, the complexity of the proposed schemes is cubic in the system dimension and is only linear in the size of the QAM modulation used. However, the computational complexity of lattice reduction algorithms imposes a large burden on the proposed detectors for large MIMO systems or fast fading channels. In Chapter 3, we propose detectors for large MIMO systems based on the combination of minimum mean square error decision feedback equalization (MMSE-DFE) and subspace detection tailored to an appropriate channel ordering. Although the achieved diversity order of the proposed detectors does not necessarily equal the full receive diversity for some MIMO systems, the coding gain allows for close to ML error performance at practical values of signal-to-noise ratio (SNR) at the cost of a small computational complexity increase over the classical MMSE- DFE detection. The receive diversity deficiency is addressed by proposing another algorithm in which a partial lattice reduction (PLR) technique is deployed to improve the diversity order. Massive multiuser MIMO (MU-MIMO) is another technology where the BS is equipped with hundreds of antennas and serves tens of single-antenna user terminals (UTs). For the uplink of massive MIMO systems, linear detectors, such as zero-forcing (ZF) and minimum mean square error (MMSE), approach the error performances of sophisticated nonlinear detectors. However, the exact solutions of ZF and MMSE involve matrix-matrix multiplication and matrix inversion operations which are expensive for massive MIMO systems. In Chapter 4, we propose efficient truncated polynomial expansion (TPE)-based detectors that achieve the error performance of the exact solutions with a computational complexity proportional to the system dimensions. The millimeter wave (mmWave) massive MIMO is another key technology for 5G cellular networks. By using hybrid beamforming techniques in which a few numbers of radio frequency (RF) chains are deployed at the BSs and the UTs, the fully-digital precoder (combiner) is approximated as a product of analog and digital precoders (combiners). In Chapter 5, we consider a signal detection scheme using the equivalent channel consisting of the precoder, mmWave channel, and combiner. The available structure in the equivalent channel enables us to achieve the BER of the optimal ML solution with a significant reduction in the computational complexity