28,319 research outputs found
Verifying the Safety of a Flight-Critical System
This paper describes our work on demonstrating verification technologies on a
flight-critical system of realistic functionality, size, and complexity. Our
work targeted a commercial aircraft control system named Transport Class Model
(TCM), and involved several stages: formalizing and disambiguating requirements
in collaboration with do- main experts; processing models for their use by
formal verification tools; applying compositional techniques at the
architectural and component level to scale verification. Performed in the
context of a major NASA milestone, this study of formal verification in
practice is one of the most challenging that our group has performed, and it
took several person months to complete it. This paper describes the methodology
that we followed and the lessons that we learned.Comment: 17 pages, 5 figure
Formal Model Engineering for Embedded Systems Using Real-Time Maude
This paper motivates why Real-Time Maude should be well suited to provide a
formal semantics and formal analysis capabilities to modeling languages for
embedded systems. One can then use the code generation facilities of the tools
for the modeling languages to automatically synthesize Real-Time Maude
verification models from design models, enabling a formal model engineering
process that combines the convenience of modeling using an informal but
intuitive modeling language with formal verification. We give a brief overview
six fairly different modeling formalisms for which Real-Time Maude has provided
the formal semantics and (possibly) formal analysis. These models include
behavioral subsets of the avionics modeling standard AADL, Ptolemy II
discrete-event models, two EMF-based timed model transformation systems, and a
modeling language for handset software.Comment: In Proceedings AMMSE 2011, arXiv:1106.596
On Synchronous and Asynchronous Monitor Instrumentation for Actor-based systems
We study the impact of synchronous and asynchronous monitoring
instrumentation on runtime overheads in the context of a runtime verification
framework for actor-based systems. We show that, in such a context,
asynchronous monitoring incurs substantially lower overhead costs. We also show
how, for certain properties that require synchronous monitoring, a hybrid
approach can be used that ensures timely violation detections for the important
events while, at the same time, incurring lower overhead costs that are closer
to those of an asynchronous instrumentation.Comment: In Proceedings FOCLASA 2014, arXiv:1502.0315
Rewriting Logic Semantics of a Plan Execution Language
The Plan Execution Interchange Language (PLEXIL) is a synchronous language
developed by NASA to support autonomous spacecraft operations. In this paper,
we propose a rewriting logic semantics of PLEXIL in Maude, a high-performance
logical engine. The rewriting logic semantics is by itself a formal interpreter
of the language and can be used as a semantic benchmark for the implementation
of PLEXIL executives. The implementation in Maude has the additional benefit of
making available to PLEXIL designers and developers all the formal analysis and
verification tools provided by Maude. The formalization of the PLEXIL semantics
in rewriting logic poses an interesting challenge due to the synchronous nature
of the language and the prioritized rules defining its semantics. To overcome
this difficulty, we propose a general procedure for simulating synchronous set
relations in rewriting logic that is sound and, for deterministic relations,
complete. We also report on two issues at the design level of the original
PLEXIL semantics that were identified with the help of the executable
specification in Maude
Overview of Hydra: a concurrent language for synchronous digital circuit design
Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit specification. The design language is inherently concurrent, and it offers black box abstraction and general design patterns that simplify the design of circuits with regular structure. Hydra specifications are concise, allowing the complete design of a computer system as a digital circuit within a few pages. This paper discusses the motivations behind Hydra, and illustrates the system with a significant portion of the design of a basic RISC processor
PALS-Based Analysis of an Airplane Multirate Control System in Real-Time Maude
Distributed cyber-physical systems (DCPS) are pervasive in areas such as
aeronautics and ground transportation systems, including the case of
distributed hybrid systems. DCPS design and verification is quite challenging
because of asynchronous communication, network delays, and clock skews.
Furthermore, their model checking verification typically becomes unfeasible due
to the huge state space explosion caused by the system's concurrency. The PALS
("physically asynchronous, logically synchronous") methodology has been
proposed to reduce the design and verification of a DCPS to the much simpler
task of designing and verifying its underlying synchronous version. The
original PALS methodology assumes a single logical period, but Multirate PALS
extends it to deal with multirate DCPS in which components may operate with
different logical periods. This paper shows how Multirate PALS can be applied
to formally verify a nontrivial multirate DCPS. We use Real-Time Maude to
formally specify a multirate distributed hybrid system consisting of an
airplane maneuvered by a pilot who turns the airplane according to a specified
angle through a distributed control system. Our formal analysis revealed that
the original design was ineffective in achieving a smooth turning maneuver, and
led to a redesign of the system that satisfies the desired correctness
properties. This shows that the Multirate PALS methodology is not only
effective for formal DCPS verification, but can also be used effectively in the
DCPS design process, even before properties are verified.Comment: In Proceedings FTSCS 2012, arXiv:1212.657
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