Custom Integrated Circuits

Contains reports on ten research projects.Analog Devices, Inc.IBM CorporationNational Science Foundation/Defense Advanced Research Projects Agency Grant MIP 88-14612Analog Devices Career Development Assistant ProfessorshipU.S. Navy - Office of Naval Research Contract N0014-87-K-0825AT&TDigital Equipment CorporationNational Science Foundation Grant MIP 88-5876

Characterization and Model Verification of SiC CMOS Transmisison Gates

The aim of this thesis is to present and explore the results of a method for characterizing CMOS transmission gates in an IC design process, as well as to describe their importance in circuit design. The method applies to any fabrication process, but the work for this thesis was conducted in a silicon-carbide process, in the first round of fabrication. The first section covers basic information regarding transmission gates, as well as showing their value in circuit design. Secondly, the design, simulation, and implementation of the characterizing test structures is detailed. The third section delineates the test setup and procedures for evaluating physical device performance, and analyzes the results obtained. Finally, the function of characterization is reviewed, and the results are related to the project at hand. The results show that the characterization, in this instance, is valuable, as the simulations varied considerably from actual performance

An Ultra-Low-Power Track-and-Hold Amplifier

The future of electronics is the Internet of Things (IoT) paradigm, where always-on devices and sensors monitor and transform everyday life. A plethora of applications (such as navigating drivers past road hazards or monitoring bridge and building stresses) employ this technology. These unattended ground-sensor applications require decade(s)-long operational life-times without battery changes. Such electronics demand stringent performance specifications with only nano-Watt power levels.This thesis presents an ultra-low-power track-and-hold amplifier for such systems. It serves as the front-end of a SAR-ADC or the building block for equalizers or filters. This amplifier\u27s design attains exceptional hold times by mitigating switch subthreshold leakage and bulk leakage. Its novel transmission-gate topology achieves wide-swing performance. Though only consuming 100 pico-Watts, it achieves a precision of 7.6 effective number of bits (ENOB). The track-and-hold amplifier was designed in 130-nm CMOS

Confession Session: Learning from Others Mistakes

Accepted versio

Contribution to improve the EMI performance of electrical drive systems in vehicles with special consideration of power semiconductor modules

Diese Arbeit dient als Beitrag zur Verbesserung des EMV-Verhaltens elektrischer Antriebssysteme in Fahrzeugen, wobei der Fokus auf dem Leistungshalbleitermodul für die Automobilanwendung liegt. Für ein besseres und tieferes Verständnis der Quelle von leitungsgebundenen Störungen werden die EMV-Mechanismen und -Effekte im Zusammenhang mit dem Leistungsmodul im Antriebssystem durch Simulationen und Messungen untersucht. Der Einfluss der Diode Reverse Recovery Effekte auf das EMV-Verhalten wird quantitativ mit verschiedenen Lastströmen sowie mit verschiedenen Diodentypen, wie z.B. SiC-Schottky-Dioden, analysiert. Durch Simulationen wird der Einfluss des Leistungsmoduls auf das System untersucht; auf dieser Basis wird die Bedeutung verschiedener Faktoren innerhalb und außerhalb des Leistungsmoduls für das EMV-Verhalten bewertet. Zur Validierung der Simulationsergebnisse wird der Messaufbau für eine konventionelle EMV-Messung für die Automobilanwendung vorgestellt. Die Messergebnisse belegen, dass die Simulationsmodelle unter bestimmten Randbedingungen für zukünftige Leistungsmodulkonstruktionen zur EMV-Vorhersage verwendbar sind. Basierend auf dem Verständnis, wie es aus den Simulationen und Messergebnissen hergeleitet wurde, werden konkrete Optimierungskonzepte für ein inhärent störungsarmes Leistungsmodul entwickelt und realisiert. Dessen EMV-Verhalten sowie der Aufwand des Musterbaus aus Sicht des Leistungsmodulherstellers werden anhand verschiedenen Kriterien verglichen und bewertet. Außerdem wird das dynamische und Kurzschlussverhalten der Prototypen einschließlich der Stromverteilung zwischen den Halbleiterchips charakterisiert. In dieser Arbeit wird ein neuartiges Testverfahren vorgestellt, mit dem es möglich ist, das leitungsgebundene EMV-Verhalten von Leistungsmodulen abzuschätzen, ohne den gesamten Testaufbau wie bei einer konventionellen EMV-Messung zu erstellen. Diese Charakterisierung kann anschließend in der Phase der Inverterentwicklung verwendet werden, um ein geeignetes Modul auszuwählen und den erwarteten Aufwand zur Einhaltung der EMV Standards zu bewerten.This work serves as a contribution to improve the EMI performance of electrical drive systems in vehicles; the focus is on the power semiconductor module for automotive application. For a better and deeper understanding of the conducted EMI source, the conducted EMI mechanisms and effects in the drive system are investigated through simulations as well as measurements with special consideration of power modules: The influence of the diode recovery effects on the EMI performance is quantitatively analyzed with different load currents, as well as with different types of diodes, e.g. SiC Schottky barrier diode. Through the simulation, the influence coming from the power module to the system is clarified; the importance of different factors inside and outside of the power module regarding EMI performance are therefore evaluated. To validate the simulation results, the setup and test bench for a conventional EMI measurement for the typical automotive application are presented. Through the measurement results it is proven that the simulation models are usable under certain boundary conditions for future power module designs with regard to the EMI prediction. Based on the understanding and the conclusions from the simulation and measurement results, concrete EMI optimization concepts for an inherently low-interference power module are developed and realized. The EMI performance as well as the feasibility of the sample modules are compared and evaluated under different criteria from the power module manufacturer’s point of view. Besides, the dynamic and short-circuit performances of the sample modules, regarding to the current distribution on the semiconductor chips, are characterized. A novel test procedure is introduced in this work, by which it is possible to estimate the conducted EMI performance of power modules without building the whole test setup like in a conventional EMI measurement. This characterization can subsequently be used in the phase of converter development to select a suitable device and evaluate the expected effort to comply with EMI standards

Bifurcations and synchronization using an integrated programmable chaotic circuit

This paper presents a CMOS chip which can act as an autonomous stand-alone unit to generate different real-time chaotic behaviors by changing a few external bias currents. In particular, by changing one of these bias currents, the chip provides different examples of a period-doubling route to chaos. We present experimental orbits and attractors, time waveforms and power spectra measured from the chip. By using two chip units, experiments on synchronization can be carried out as well in real-time. Measurements are presented for the following synchronization schemes: linear coupling, drive-response and inverse system. Experimental statistical characterizations associated to these schemes are also presented. We also outline the possible use of the chip for chaotic encryption of audio signals. Finally, for completeness, the paper includes also a brief description of the chip design procedure and its internal circuitry

Automatic synthesis of analog layout : a survey

A review of recent research in the automatic synthesis of physical geometry for analog integrated circuits is presented. On introduction, an explanation of the difficulties involved in analog layout as opposed to digital layout is covered. Review of the literature then follows. Emphasis is placed on the exposition of general methods for addressing problems specific to analog layout, with the details of specific systems only being given when they surve to illustrate these methods well. The conclusion discusses problems remaining and offers a prediction as to how technology will evolve to solve them. It is argued that although progress has been and will continue to be made in the automation of analog IC layout, due to fundamental differences in the nature of analog IC design as opposed to digital design, it should not be expected that the level of automation of the former will reach that of the latter any time soon