Variable Spurious Noise Mitigation Techniques in Hysteretic Buck Converters

This work proposes a current-mode hysteretic buck converter with a spur-free constant-cycle frequency-hopping controller that fully eliminates spurs from the switching noise spectrum irrespective of variations in the switching frequency and operating conditions. As a result, the need for frequency regulation loops to ensure non-varying switching frequency (i.e. fixed spurs location) in hysteretic controllers is eliminated. Moreover, compared to frequency regulation loops, the proposed converter offers the advantage of eliminating mixing and interference altogether due to its spur-free operation, and thus, it can be used to power, or to be integrated within noise-sensitive systems while benefiting from the superior dynamic performance of its hysteretic operation. The proposed converter uses dual-sided hysteretic band modulation to eliminate the inductor current imbalance that results from frequency hopping along with the output voltage transients and low-frequency noise floor peaking associated with it. Moreover, a feedforward adaptive hysteretic band controller is proposed to reduce variations in the switching frequency with the input voltage, and an all-digital soft-startup circuit is proposed to control the in-rush current without requiring any off-chip components. The converter is implemented in a 0.35-õm standard CMOS technology and it achieves 92% peak efficiency

Analysis of a bidirecctional coupled-inductor Cuk converter operating in sliding mode

Analytic models for a bidirectional coupled-inductor Cuk converter operating in sliding mode are described. Using a linear combination of the converter four state variable errors as a general switching surface, the expression for the equivalent control is derived and the coordinates of the equilibrium point are obtained. Particular cases of the general switching surface are subsequently analyzed in detail: 1) surfaces for ideal line regulation, 2) surfaces for ideal load regulation, and 3) surfaces for hysteretic current control. Simulation results verifying the analytical predictions are presented.Peer Reviewe

Power conversion techniques in nanometer CMOS for low-power applications

As System-on-Chip (SoCs) in nanometer CMOS technologies grow larger, the power management process within these SoCs becomes very challenging. In the heart of this process lies the challenge of implementing energy-efficient and cost-effective DC-DC power converters. To address this challenge, this thesis studies in details three different aspects of DC-DC power converters and proposes potential solutions. First, to maximize power conversion efficiency, loss mechanisms must be studied and quantified. For that purpose, we provide comprehensive analysis and modeling of the various switching and conduction losses in low-power synchronous DC-DC buck converters in both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) operation, including the case with non-rail gate control of the power switches. Second, a DC-DC buck converter design with only on-chip passives is proposed and implemented in 65-nm CMOS technology. The converter switches at 588 MHz and uses a 20-nH and 300-pF on-chip inductor and capacitor respectively, and provides up to 30-mA of load at an output voltage in the range of 0.8-1.2 V. The proposed design features over 10% improvement in power conversion efficiency over a corresponding linear regulator while preserving low-cost implementation. Finally, a 40-mA buck converter design operating in the inherently-stable DCM mode for the entire load range is presented. It employs a Pulse Frequency Modulation (PFM) scheme using a Hysteretic-Assisted Adaptive Minimum On-Time (HA-AMOT) controller to automatically adapt to a wide range of operating scenarios while minimizing inductor peak current. As a result, compact silicon area, low quiescent current, high efficiency, and robust performance across all conditions can be achieved without any calibration

Unified model of voltage/current mode control to predict saddle-node bifurcation

A unified model of voltage mode control (VMC) and current mode control (CMC) is proposed to predict the saddle-node bifurcation (SNB). Exact SNB boundary conditions are derived, and can be further simplified in various forms for design purpose. Many approaches, including steady-state, sampled-data, average, harmonic balance, and loop gain analyses are applied to predict SNB. Each approach has its own merits and complement the other approaches.Comment: Submitted to International Journal of Circuit Theory and Applications on December 23, 2010; Manuscript ID: CTA-10-025

Battery-sourced switched-inductor multiple-output CMOS power-supply systems

Wireless microsystems add intelligence to larger systems by sensing, processing and transmitting information which can ultimately save energy and resources. Each function has their own power profile and supply level to maximize performance and save energy since they are powered by a small battery. Also, due to its small size, the battery has limited energy and therefore the power-supply system cannot consume much power. Switched-inductor converters are efficient across wide operating conditions but one fundamental challenge is integration because miniaturized dc-dc converters cannot afford to accommodate more than one off-chip power inductor. The objective of this research is to explore, develop, analyze, prototype, test, and evaluate how one switched inductor can derive power from a small battery to supply, regulate, and respond to several independent outputs reliably and accurately. Managing and stabilizing the feedback loops that supply several outputs at different voltages under diverse and dynamic loading conditions with one CMOS chip and one inductor is also challenging. Plus, since a single inductor cannot supply all outputs at once, steady-state ripples and load dumps produce cross-regulation effects that are difficult to manage and suppress. Additionally, as the battery depletes the power-supply system must be able to regulate both buck and boost voltages. The presented system can efficiently generate buck and boost voltages with the fastest response time while having a low silicon area consumption per output in a low-cost technology which can reduce the overall size and cost of the system.Ph.D

Control Techniques for DC-DC Buck Converter with Improved Performance

The switched-mode dc-dc converters are some of the most widely used power electronics circuits for its high conversion efficiency and flexible output voltage. These converters used for electronic devices are designed to regulate the output voltage against the changes of the input voltage and load current. This leads to the requirement of more advanced control methods to meet the real demand. Many control methods are developed for the control of dc-dc converters. To obtain a control method that has the best performances under any conditions is always in demand. Conventionally, the dc-dc converters have been controlled by linear voltage mode and current mode control methods. These controllers offer advantages such as fixed switching frequencies and zero steady-state error and gives a better small-signal performance at the designed operating point. But under large parameter and load variation, their performance degrades. Sliding mode (SM) control techniques are well suited to dc-dc converters as they are inherently variable structure systems. These controllers are robust concerning converter parameter variations, load and line disturbances. SM controlled converters generally suffer from switching frequency variation when the input voltage and output load are varied. This complicates the design of the input and output filters. The main objective of this research work is to study different control methods implemented in dc-dc converter namely (linear controllers, hysteresis control, current programmed control, and sliding mode (SM) control). A comparison of the effects of the PWM controllers and the SM control on the dc-dc buck converter response in steady state, under line variations, load variations is performed

MODELING AND CONTROL OF DIRECT-CONVERSION HYBRID SWITCHED-CAPACITOR DC-DC CONVERTERS

Efficient power delivery is increasingly important in modern computing, communications, consumer and other electronic systems, due to the high power demand and thermal concerns accompanied by performance advancements and tight packaging. In pursuit of high efficiency, small physical volume, and flexible regulation, hybrid switched-capacitor topologies have emerged as promising candidates for such applications. By incorporating both capacitors and inductors as energy storage elements, hybrid topologies achieve high power density while still maintaining soft charging and efficient regulation characteristics. However, challenges exist in the hybrid approach. In terms of reliability, each flying capacitor should be maintained at a nominal `balanced\u27 voltage for robust operation (especially during transients and startup), complicating the control system design. In terms of implementation, switching devices in hybrid converters often need complex gate driving circuits which add cost, area, and power consumption. This dissertation explores techniques that help to mitigate the aforementioned challenges. A discrete-time state space model is derived by treating the hybrid converter as two subsystems, the switched-capacitor stage and the output filter stage. This model is then used to design an estimator that extracts all flying capacitor voltages from the measurement of a single node. The controllability and observability of the switched-capacitor stage reveal the fundamental cause of imbalance at certain conversion ratios. A new switching sequence, the modified phase-shifted pulse width modulation, is developed to enable natural balance in originally imbalanced scenarios. Based on the model, a novel control algorithm, constant switch stress control, is proposed to achieve both output voltage regulation and active balance with fast dynamics. Finally, the design technique and test result of an integrated hybrid switched-capacitor converter are reported. A proposed gate driving strategy eliminates the need for external driving supplies and reduces the bootstrap capacitor area. On-chip mixed signal control ensures fast balancing dynamics and makes hard startup tolerable. This prototype achieves 96.9\% peak efficiency at 5V:1.2V conversion and a startup time of 12$\mu s$, which is over 100 times faster than the closest prior art. With the modeling, control, and design techniques introduced in this dissertation, the application of hybrid switched-capacitor converters may be extended to scenarios that were previously challenging for them, allowing enhanced performance compared to using traditional topologies. For problems that may require future attention, this dissertation also points to possible directions for further improvements

Multifrequency Averaging of Hysteresis-Current-Controlled DC-DC Converters

Multifrequency averaging is one of the widely used modeling and simulation techniques today for the analysis and design of power electronic systems. This technique is capable of providing the average behavior as well as the ripple behavior of power electronic systems. Hysteresis current control has fast response and internal current stability through controlling switches to maintain the current within a given hysteresis band of a given current command. However the state space variables in a hysteresis controlled system cannot be directly approached by multifrequency averaging method because of time varing switching frequency. In this thesis, a method of applying multifrequency averaging to hysteresis current controlled dc-dc converters is proposed. A dc-dc converter model with the application of this method has been successfully developed and validated both in simulation and experiment

A very simple analog control for QSW-ZVS source/sink buck converter with seamless mode transition

A simple, analog, control circuit is proposed for seamless transition between source and sink modes in a Quasi-Square-Wave Zero Voltage Switching (QSW-ZVS) source/sink buck converter. The inductor current is controlled by a variablewidth hysteretic current mode control. The upper and lower bounds of the hysteretic band are clamped to ensure QSW-ZVS operation with a single current command from the control loop and independently from the power flow direction. This enables the control of any PWM converter able to operate in QSW-ZVS with a single control loop. If the proposed circuit is used, using a complex multi-mode or look-up-table based digital control is no longer required, simplifying the implementation and lowering the cost of the converter. A 50 W buck converter is built to demonstrate the proposed control circuit and experimental measurements are shown to verify its correct operation.Este trabajo ha sido financiado por el Gobierno de España a través del proyecto DPI2013-47176-C2-2-R y el Gobierno del Principado de Asturias a través del proyecto SV-PA-17-RIS3-4, la beca “Severo Ochoa” BP14-085 y los fondos FEDER.Nineteenth IEEE Workshop on Control and Modeling for Power Electronics, IEEE COMPEL 201

Mixed-source charger-supply CMOS IC

The proposed research objective is to develop, test, and evaluate a mixer and charger-supply CMOS IC that derives and mixes energy and power from mixed sources to accurately supply a miniaturized system. Since the energy-dense source stores more energy than the power-dense source while the latter supplies more power than the former, the proposed research aims to develop an IC that automatically selects how much and from which source to draw power to maximize lifetime per unit volume. Today, the state of the art lacks the intelligence and capability to select the most appropriate source from which to extract power to supply the time-varying needs of a small system. As such, the underlying objective and benefit of this research is to reduce the size of a complete electronic system so that wireless sensors and biomedical implants, for example, as a whole, perform well, operate for extended periods, and integrate into tiny spaces.Ph.D