Low-complexity dominance-based Sphere Decoder for MIMO Systems

The sphere decoder (SD) is an attractive low-complexity alternative to maximum likelihood (ML) detection in a variety of communication systems. It is also employed in multiple-input multiple-output (MIMO) systems where the computational complexity of the optimum detector grows exponentially with the number of transmit antennas. We propose an enhanced version of the SD based on an additional cost function derived from conditions on worst case interference, that we call dominance conditions. The proposed detector, the king sphere decoder (KSD), has a computational complexity that results to be not larger than the complexity of the sphere decoder and numerical simulations show that the complexity reduction is usually quite significant

Write Channel Model for Bit-Patterned Media Recording

We propose a new write channel model for bit-patterned media recording that reflects the data dependence of write synchronization errors. It is shown that this model accommodates both substitution-like errors and insertion-deletion errors whose statistics are determined by an underlying channel state process. We study information theoretic properties of the write channel model, including the capacity, symmetric information rate, Markov-1 rate and the zero-error capacity.Comment: 11 pages, 12 figures, journa

Generalized discrete Fourier transform with non-linear phase : theory and design

Constant modulus transforms like discrete Fourier transform (DFT), Walsh transform, and Gold codes have been successfully used over several decades in various engineering applications, including discrete multi-tone (DMT), orthogonal frequency division multiplexing (OFDM) and code division multiple access (CDMA) communications systems. Among these popular transforms, DFT is a linear phase transform and widely used in multicarrier communications due to its performance and fast algorithms. In this thesis, a theoretical framework for Generalized DFT (GDFT) with nonlinear phase exploiting the phase space is developed. It is shown that GDFT offers sizable correlation improvements over DFT, Walsh, and Gold codes. Brute force search algorithm is employed to obtain orthogonal GDFT code sets with improved correlations. Design examples and simulation results on several channel types presented in the thesis show that the proposed GDFT codes, with better auto and cross-correlation properties than DFT, lead to better bit-error-rate performance in all multi-carrier and multi-user communications scenarios investigated. It is also highlighted how known constant modulus code families such as Walsh, Walsh-like and other codes are special solutions of the GDFT framework. In addition to theoretical framework, practical design methods with computationally efficient implementations of GDFT as enhancements to DFT are presented in the thesis. The main advantage of the proposed method is its ability to design a wide selection of constant modulus orthogonal code sets based on the desired performance metrics mimicking the engineering .specs of interest. Orthogonal Frequency Division Multiplexing (OFDM) is a leading candidate to be adopted for high speed 4G wireless communications standards due to its high spectral efficiency, strong resistance to multipath fading and ease of implementation with Fast Fourier Transform (FFT) algorithms. However, the main disadvantage of an OFDM based communications technique is of its high PAPR at the RF stage of a transmitter. PAPR dominates the power (battery) efficiency of the radio transceiver. Among the PAPR reduction methods proposed in the literature, Selected Mapping (SLM) method has been successfully used in OFDM communications. In this thesis, an SLM method employing GDFT with closed form phase functions rather than fixed DFT for PAPR reduction is introduced. The performance improvements of GDFT based SLM PAPR reduction for various OFDM communications scenarios including the WiMAX standard based system are evaluated by simulations. Moreover, an efficient implementation of GDFT based SLM method reducing computational cost of multiple transform operations is forwarded. Performance simulation results show that power efficiency of non-linear RF amplifier in an OFDM system employing proposed method significantly improved

Quantum Approximation Optimization Algorithm for the trellis based Viterbi decoding of classical error correcting codes

We construct a quantum-classical Viterbi decoder for the classical error-correcting codes. Viterbi decoding is a trellis-based procedure for maximum likelihood decoding of classical error-correcting codes. In this article, we show that any number of paths with the minimum Hamming distance with respect to the received erroneous vector present in the trellis can be found using the quantum approximate optimization algorithm. We construct a generalized method to map the Viterbi decoding problem into a parameterized quantum circuit for any classical linear block codes. We propose a uniform parameter optimization strategy to optimize the parameterized quantum circuit. We observe that the proposed method is efficient for generating low-depth trainable parameterized quantum circuits. This renders the hybrid decoder more efficient than previous attempts at making quantum Viterbi algorithm. We show that using uniform parameter optimization, we obtain parameters more efficiently for the parameterized quantum circuit than many previous attempts made through random sampling and fixing the parameters.Comment: 28 pages, 18 figures, pre-prin

Trellis phase codes for power-bandwith efficient satellite communications

Support work on improved power and spectrum utilization on digital satellite channels was performed. Specific attention is given to the class of signalling schemes known as continuous phase modulation (CPM). The specific work described in this report addresses: analytical bounds on error probability for multi-h phase codes, power and bandwidth characterization of 4-ary multi-h codes, and initial results of channel simulation to assess the impact of band limiting filters and nonlinear amplifiers on CPM performance

A hardware spinal decoder

Spinal codes are a recently proposed capacity-achieving rateless code. While hardware encoding of spinal codes is straightforward, the design of an efficient, high-speed hardware decoder poses significant challenges. We present the first such decoder. By relaxing data dependencies inherent in the classic M-algorithm decoder, we obtain area and throughput competitive with 3GPP turbo codes as well as greatly reduced latency and complexity. The enabling architectural feature is a novel alpha-beta incremental approximate selection algorithm. We also present a method for obtaining hints which anticipate successful or failed decoding, permitting early termination and/or feedback-driven adaptation of the decoding parameters. We have validated our implementation in FPGA with on-air testing. Provisional hardware synthesis suggests that a near-capacity implementation of spinal codes can achieve a throughput of 12.5 Mbps in a 65 nm technology while using substantially less area than competitive 3GPP turbo code implementations.Irwin Mark Jacobs and Joan Klein Jacobs Presidential FellowshipIntel Corporation (Fellowship)Claude E. Shannon Research Assistantshi