Ultra-Low-Power Superconductor Logic

We have developed a new superconducting digital technology, Reciprocal Quantum Logic, that uses AC power carried on a transmission line, which also serves as a clock. Using simple experiments we have demonstrated zero static power dissipation, thermally limited dynamic power dissipation, high clock stability, high operating margins and low BER. These features indicate that the technology is scalable to far more complex circuits at a significant level of integration. On the system level, Reciprocal Quantum Logic combines the high speed and low-power signal levels of Single-Flux- Quantum signals with the design methodology of CMOS, including low static power dissipation, low latency combinational logic, and efficient device count.Comment: 7 pages, 5 figure

Architectures for a quantum random access memory

A random access memory, or RAM, is a device that, when interrogated, returns the content of a memory location in a memory array. A quantum RAM, or qRAM, allows one to access superpositions of memory sites, which may contain either quantum or classical information. RAMs and qRAMs with n-bit addresses can access 2^n memory sites. Any design for a RAM or qRAM then requires O(2^n) two-bit logic gates. At first sight this requirement might seem to make large scale quantum versions of such devices impractical, due to the difficulty of constructing and operating coherent devices with large numbers of quantum logic gates. Here we analyze two different RAM architectures (the conventional fanout and the "bucket brigade") and propose some proof-of-principle implementations which show that in principle only O(n) two-qubit physical interactions need take place during each qRAM call. That is, although a qRAM needs O(2^n) quantum logic gates, only O(n) need to be activated during a memory call. The resulting decrease in resources could give rise to the construction of large qRAMs that could operate without the need for extensive quantum error correction.Comment: 10 pages, 7 figures. Updated version includes the answers to the Refere

Single Event Effects in the Pixel readout chip for BTeV

In future experiments the readout electronics for pixel detectors is required to be resistant to a very high radiation level. In this paper we report on irradiation tests performed on several preFPIX2 prototype pixel readout chips for the BTeV experiment exposed to a 200 MeV proton beam. The prototype chips have been implemented in commercial 0.25 um CMOS processes following radiation tolerant design rules. The results show that this ASIC design tolerates a large total radiation dose, and that radiation induced Single Event Effects occur at a manageable level.Comment: 15 pages, 6 Postscript figure

Stochastic resonance in electrical circuits—I: Conventional stochastic resonance.

Stochastic resonance (SR), a phenomenon in which a periodic signal in a nonlinear system can be amplified by added noise, is introduced and discussed. Techniques for investigating SR using electronic circuits are described in practical terms. The physical nature of SR, and the explanation of weak-noise SR as a linear response phenomenon, are considered. Conventional SR, for systems characterized by static bistable potentials, is described together with examples of the data obtainable from the circuit models used to test the theory

Television signal processing system Patent

Video signal processing system for sampling video brightness level