High-purity Refractory Metals for Thin Film Metallization of VLSI

It is shown that cast targets of highly pure refractory metals like W, Mo, Ti, Ta, Co, etc. and their compounds can be produced by means of a set of vacuum-metallurgical techniques—by vacuum high-frequency levitation, EB floating zone melting, EB melting, and electric arc vacuum melting as well as chemical purifying by ion exchange and halides. The cast refractory metal targets are extremely pure and chemically homogeneous. For magnetron sputtering and laser ablation, the cast silicide targets are also produced. The study reveals the possibilities and conditions of depositing the silicides and titanium-tungsten barrier layers by both the laser evaporation and magnetron sputtering. The physical and structural parameters as well as a trace impurity composition of sputtered metals and deposited thin films are studied by grazing-beam incidence X-ray diffraction, Auger electron spectroscopy, Rutherford backscattering of helium ions, mass spectrometry with inductively coupled plasma, etc

Design and micro-fabrication of tantalum silicide cantilever beam threshold accelerometer

Microfabricated threshold accelerometers were successfully designed and fabricated following a careful analysis of the electrical, mechanical, and fabrication issues inherent to micron-sized accelerometers. A uniform cantilever beam was chosen because of the simplicity of design and fabrication. New models for the electrostatic force exerted on the cantilever beam were developed and calculations were made that accurately predicted the electrical characteristics of the accelerometer. The calculations also provided design guidelines for optimizing the accelerometer dimensions. Computer simulation demonstrated that the error of the electrostatic force, calculated using the most accurate model, was within 2% of the actual force which was obtained by integrating the closed formula, through the bent beam curvature, for device parameters designed to detect an acceleration of 50 g. Conversely, it was shown that the widely used conventional parallel plate model had an error of approximately 90%. Novel surface micromachining process steps were successfully developed to fabricate the cantilever beam accelerometers. Sputter deposited tantalum silicide and commercially available spin-on-glass were used as a structural layer and a sacrificial layer, respectively. The dependence of resistivity, crystalline structure, Young\u27s modulus, and hardness of the tantalum silicide films on the annealing temperatures were measured. These results were employed to design accelerometers that were successfully operated. Excluding the metallization steps, only two masks and four photolithography steps were required. However, both positive and negative photoresists had to be utilized. NJIT\u27s standard photolithography steps were used for positive photoresist; however for the negative photoresist a specially developed multi-puddle process was used to obtain 4 micron resolution. Electrostatic attraction tests, of accelerometers, were performed using the Keithley current-voltage measurement system. These tests used deflection voltages ranging from 2.2 to 37.0 volts, corresponding to threshold acceleration levels from 580 to 18,500 g. Nearly 70 percent of the threshold voltage results fell within the expected error limits set by the accuracy of the device dimensions when processing tolerances were taken into account including the thickness variation caused by 8% uncertainty in the buffered HF etch rate of tantalum silicide. Some accelerometers were closed and opened 3 times without failure. The accelerometers tended to break after 3 times of operation and this was attributed to the welding of contacts. Centrifuge acceleration tests of accelerometers were carried out in a specially designed centrifuge in an acceleration range of 282 to 11,200 g. Nearly 80 percent of the threshold acceleration results fell within the expected error limits set by the accuracy of the device dimensions when processing tolerances were taken into account

Development of nickel silicide for integrated circuit technology

Continuous advancements in devices, materials and processes have resulted in integrated circuits with smaller device dimensions, higher functionality and higher speed. The complementary metal oxide semiconductor (CMOS) technology has been the engine of this success. The MOS transistor is shrinking following the Moore\u27s Law over the last several decades. As the device dimensions are approaching nanometer regime, parasitic resistance, capacitance and inductance are beginning to influence the performance significantly. Self-aligned silicide process was developed in mid eighties that allowed reduction of gate and contact resistance by using metal silicides as low resistivity materials. The process also enabled higher packing density. Many silicides have been extensively studied and Titanium silicide (TiSi2) and Cobalt silicide (CoSi2) have been implemented into modern devices. With devices shrinking, TiSi2 and CoSi2 are finding serious limitations of linewidth effect and excessive silicon consumption. One attractive alternative is nickel monosilicide (NiSi). NiSi has comparable resistivity as traditional silicides yet consumes less silicon during formation, no line width dependence, single thermal treatment, and relatively planar silicide-silicon interface. However, implementation of NiSi into future generation devices has been delayed by limited knowledge of its thermal instability. In the study presented in this thesis, silicidation of nickel metal has been investigated. Silicidation has been carried out on doped and non-doped polycrystalline and crystalline silicon regions. Rapid thermal process was used for the silicidation of sputtered nickel metal into nickel silicide. The electrical and material properties of nickel silicide were characterized, and correlations between electrical data, material properties, and silicidation conditions have been made. Electrical resistivity was calculated through the uses of sheet resistivity measurements using the four-point probe technique and the grooving technique. The grooving technique was used to measure the silicide\u27s thickness necessary for electrical resistivity calculation. The silicide surface topography and phase composition were analyzed using the AFM and XRD technique respectively. Furthermore, RBS and SIMS analysis were done to complement the material properties study of nickel silicide. The experimental result showed strong correlation between nickel silicide\u27s electrical resistivity with surface topography and phase composition. A multiple phases mixture composition was observed in crystalline silicon and polysilicon regions at temperature less than 573°C and 695°C respectively. It is concluded that the most optimal silicidation condition for obtaining the single-phase nickel monosilicide was at 695°c for 60 sec. Such condition yield a NiSi film with an electrical resistivity of ~1.6 x 10-5 (Si), 3.3 x 10-5 Ω-cm (Poly). The most optimal silicidation for obtaining the lowest multi-phase mixture silicide was found to be at 500°C for 20sec or more. Such condition yielded a NixSi + NiSi phase mixture with an electrical resistivity of ~ 1.6 x 10-5 (Si), 2.5 x 10-5 Ω-cm (Poly)

Proceedings of the Cold Electronics Workshop

The benefits and problems of the use of cold semiconductor electronics and the research and development effort required to bring cold electronics into more widespread use were examined

Synthesis and characterization of low pressure chemically vapor deposited boron nitride and titanium nitride films

This study has investigated the interrelationships governing the growth kinetics, resulting compositions, and properties of boron nitride (B-C-N-H) and titanium nitride (Ti-N-Cl) films synthesized by low pressure chemical vapor deposition (LPCVD) using ammonia (NH3)/triethylamine-borane and NH3/titanium tetrachloride as reactants, respectively.Several analytical methods such as the FTIR, UVNisible spectroscopy, XPS, AES, RBS, SEM, and XRD were used to study the stoichiometry and structure of the deposited films. The B-N-C-H films were synthesized over a temperature range of 300 to 8500C at various flow rate ratios of the reactants and total pressure range of 50 to 150 mTorr. The deposits were amorphous in all cases having an index of refraction ranging between 1.76 and 2.47 depending on the composition of the films. The stress of the deposited films varied from +240 to -200 Wa, depending on the deposition parameters. The hardness and Young\u27s modulus were found to be between 5 to 12 GPa and 50 to 120 GPa, respectively. Electrical properties of the BN films were measured using metal-insulator-metal (MIM) and metal-insulator-semiconductor (MIS) structures. The films did not react with water vapor and exhibited dielectric constant between 3.12 and 5.5. Free standing X-ray windows with thickness varying from 2000Å to 12,000Å, were fabricated using the mildly tensile and compressive films and X-ray transmission studies through these windows indicate significantly lower absorption when compared to the commercially available polymeric X-ray windows. The Ti-N-Cl deposits exhibited an Arrhenius d ependence in the deposition temperature regime of 450 to 600 °C from which an activation energy of ~42 kJ/mol was calculated. The growth rate dependencies on the partial pressures of NH3 (50 to 100 mTorr) and TiC14 (1 to 12 mTorr) yielded reaction rate orders of 1.37 and -0.42 respectively. Films with compositions trending towards stoichiometry were produced as the deposition temperature was decreased and the NH3 partial pressure was increased. The chlorine concentration in the films was observed to decrease from ~8 % (a/o) at the deposition temperature of 450 °C down to ~0.2 % (a/o) at 850 °C. The film density values increased from 3.53 to 5.02 g/cm3 as the deposition temperature was increased from 550 to 850 °C. The resistivity of the films was dependent on changes in deposition temperature and flow rate ratios. The lowest resistivity value of 86 µΩcm was measured for a deposition temperature of 600°C and an NH3/TiCl4 flow ratio of 10/1. The film stress was found to be tensile for all deposits and to decrease with higher deposition temperatures. Nanoindentation measurements yielded values for the hardness and Young\u27s modulus of the films to be around 15 and 250 GPa, respectively. X-ray diffraction measurements revealed in all cases the presence of cubic TiN phase with a preferred (200) orientation. For the investigated aspect ratios of up to 4: 1, the deposits were observed to exhibit conformal step coverage over the investigated range of processing conditions

Effect of Transmission Line Measurement (TLM) Geometry on Specific Contact Resistivity Determination

Ohmic metal semiconductor contacts are indispensable part of a semiconductor device. These are characterized by their specific contact resistivity (ρ_c) in expressed in Ohm-cm^2, defined as the inverse slope of current density versus voltage curve at origin. Engineering and measurement of specific contact resistivity (ρ_c) is becoming of increasing importance in the semiconductor industry. Devices ranging from integrated circuits to solar cells use contact resistivity as a measure of device performance. Novel methods such as contact silicidation, doped-metal contacts, dipole inserted contacts etc. are continually being developed to reduce specific contact resistivity and improve device performance. The Transmission Line Measurement (TLM) method is most commonly used to extract the specific contact resistivity for such applications. This method is, however, not fully understood and modeled to understand the flow of current and behavior of charge carriers for contacts of different dimensions. It has often been observed in literature that applications that involve smaller TLM geometries most often than not, show low values of ρ_c and applications that involve ρ_c extraction through larger TLM geometries show significantly larger values. A perfect example of this would be the inconsistencies observed in extracted ρ_c\u27s from integrated circuit applications where TLM geometries range from 0.1 um to 10 um and extracted ρ_c is of the order of 10^{-8} to 10^{-6} Ohm-cm^2 and photovoltaic applications where geometries are around 50 um to 1000 um and ρ_c is of the order of 10^{-5} to 10^{-2} Ohm-cm^2. The transfer length or L_T which is the characteristic length that the charge carriers travel beneath the contact before flowing up into the contact. It has also been seen that in certain cases of TLM device dimensions, the extracted L_T is greater than the actual length of the contact. This occurence cannot be effectively explained through the conventional TLM analysis. In this project, the inconsistencies observed in literature were initially attributed to the error in measurement. Equations for relative uncertainty due to systematic error were optimized to obtain values of optimum TLM widths for application specific values of ρ_c. TLM structures with varying widths were fabricated and tested. Underlying doped regions were created through methods of ion implantation and spin-on-doping targeted for particular values of sheet resistance. The contacts were fabricated on high and low values of sheet resistances using Aluminum, NiSi and TiSi_2 metals. This was used to experimentally compare the experimental and simulated values of the optimum widths. The devices were also fabricated with changing contact length in order to try to explain the occurence of the transfer length to be greater than the length of the contact. The experimental mask design had test structures with constant width and varying TLM lengths. Scaling structures where both the length and width of the TLM geometry were also increased proportionally to evaluate the scaling effect of the TLM length and width on the extracted transfer length. The fabricated TLM structures were then tested and the data was analysed to obtain values of the transfer length (L_T) and ρ_c. The relative uncertainty due to systematic error in ρ_c was also evaluated. The experimental values of the optimum widths for the least amount of measurement error were a close match to those obtained through simulations. It was also observed that for a contact made with a particular metal on a doped layer of a particular sheet resistance, the L_T increased as the width of the TLM structure increased. Many cases were observed where the extracted L_T was greater than the length of the contact, indicative of current crowding. This was the first time this relation was observed and this prompted a mask design with changing TLM lengths. A similar linear relation was observed on constant width and changing the length of the contacts. The scaled structures showed that on simultaneously increasing the length and width of the TLM contacts, the transfer length proportionally increased. There is, therefore, a geometric dependence of L_T extracted from the measurement of the TLM structures. Through the use of the exact field solution modeling, L_T is underestimated in the integrated circuit application space due to current crowding effects and overestimated in the case of silicon photovoltaics. There is no one-size-fits-all geometry that can be used for any particular application space. Due to the observed underestimations, it was also concluded that the TLM method is not an appropriate method to determine ρ_c for nanoscale contact applications

Tantalum-based diffusion barriers for copper metallization

Interfacial reactions between Cu and Si with different Ta-based diffusion barriers are investigated by means of the combined thermodynamic-kinetic and microstructural analysis. The reaction mechanisms and the related microstructures in the Si/Ta/Cu, Si/TaC/Cu and Si/Ta2N/Cu metallization systems are studied experimentally and theoretically by utilizing the ternary Si-Ta-Cu, Si-Ta-C, Si-Ta-N, Ta-C-Cu, and Ta-N-Cu phase diagrams as well as the activity diagrams calculated at different temperatures. The effects of oxygen on the reactions in the Si/Ta/Cu and Si/TaC/Cu metallization systems are investigated by employing also the evaluated Ta-O and Ta-C-O phase diagrams. The experimental investigations are carried out with the help of sheet resistance measurements, x-ray diffraction (XRD), Rutherford backscattering spectroscopy (RBS), scanning electron microscopy (SEM), secondary ion mass spectroscopy (SIMS) and transmission electron microscopy (TEM). It is shown that by using the combined thermodynamic-kinetic approach a better understanding about the reactions taking place in the Si/Cu diffusion couples with different Ta-based diffusion barriers can be achieved. The diffusion barrier solutions using Ta are good candidates for practical applications.reviewe

Investigations carried out under the Director's Discretionary Fund

This annual report comprises a set of summaries, describing task objectives, progress and results or accomplishments, future outlook, and financial status for each director's discretionary fund (DDF) task that was active during fiscal year 1984. Publications and conference presentations related to the work are listed. The individual reports are categorized as interim or final according to whether the task efforts are ongoing or completed. A partial list of new tasks to be initiated with fiscal year 1985 funds and a glossary of abbreviations and acronyms, used by the task authors in their summaries are included. The table of contents lists the DDF reports in sequence by their task number, which is derived from the 13-digit code assigned to account for the fund awarded to the task project

Low pressure chemical vapor deposition of copper films from CU(I)(HFAC)(TMVS)

Recently, copper has been found as a possible substitute for Al alloys because of its low resistivity (1.67 μΩ • cm) and potentially improved resistance to electromigration. Conventional physical vapor deposition (PVD) method do not provide the conformal deposition profile for the high density integrated circuit, therefore, chemical vapor deposition (CVD) has become the most promising method for the resulting conformal profile. In this work, a cold wall, single wafer, CVD tungsten reactor was used for the deposition of copper with Cu(I)(hfac)(tmvs). Film growth rates were between 100 to 800 A/min depending on processing conditions, and an Arrhenius type activation energy of 16.1 kcal/mole was obtained in the temperature region of 150-180 °C. No significant amount of contamination is detected in the copper films, and the resistivity of the films was routinely near 2.2 μΩ • cm when the film was 5000 A or more. The surface roughness of the films increased with increasing film thickness, and the crystal orientation was found as a function of growth rate. These obtained results demonstrated the feasibility of using Cu(I)(hfac)(tmvs) in the synthesis of high purity copper films using liquid injection by LPCVD

Phase formation and size effects in nanoscale silicide layers for the sub-100 nm microprocessor technology

Silizide spielen ein wesentliche Rolle in den technologisch fortschrittlichsten CMOS Bauteilen. Sie finden Verwendung als Kontaktmaterial auf den Aktivgebieten und dem Silizium Gatter von Transistoren. Diese Arbeit beschäftigt sich mit den Systemen: Co-Si, Co-Ni-Si und Ni-Si. Sowohl in situ Hochtemperatur-SR-XRD Experimente als auch CBED wurden zur Phasenidentifikation herangezogen. AES erlaubte es, Elementverteilungen in Schichtstapeln zu bestimmen. Für Studien über Agglomerationserscheinungen wurde REM eingesetzt. TEM und analytisches TEM trugen nicht nur zu Einblicken in Schichtstrukturen und Kornformen bei, sondern lieferten auch Daten zu Elementverteilungen in Silizidschichten. Diese Dissertation gliedert sich in zwei Hauptteile. Der erste Teil beschäftigt sich mit den Phasenbildungsabfolgen und den Phasenbildungs- und Umwandlungstemperaturen in nanoskaligen dünnen Schichten. Als Trägermaterial wurden einkristalline und polykristalline Siliziumsubstrate verwendet. Der Einfluß verschiedener Dotierungen im Vergleich zu undotierten Substraten sowie die Beeinflussung der Silizidierung durch eine Deckschicht wurden untersucht. Im zweiten Teil waren Größeneffekte verschiedener Schichtdicken und Agglomerationserscheinungen Gegenstand von Untersuchungen. Unterschiede bei der Silizidierung in Zusammenhang mit unterschiedlichen Schichtdicken wurden bestimmt. Darüberhinaus wurde eine ternäre CoTiSi Phase gefunden und identifiziert. Außerdem konnte die stark eingeschränkte Mischbarkeit der Monosilizide CoSi und NiSi gezeigt werden. Der thermische Ausdehnungskoeffizient von NiSi im Temperaturbereich 400?700°C und sein nicht-lineares Verhalten wurden bestimmt.Silicides are an essential part of state-of-the-art CMOS devices. They are used as contact material on the active regions as well as on the Si gate of a transistor. In this work, investigations were performed in the systems Co-Si, Co-Ni-Si, and Ni-Si. In situ high temperature SR-XRD and CBED techniques were used for phase identification. AES enabled the determination of elemental concentrations in layer stacks. SEM was applied to agglomeration studies. TEM imaging and analytical TEM provided insights into layer structures, grain morphology as well as information about the distribution of chemical elements within silicide layers. This thesis is divided into two main parts. The first part deals with the phase formation sequences and the phase formation and conversion temperatures in nanoscale thin films on either single crystal or polycrystalline Si substrates. The effect of different types of dopants vs. no doping and the impact of a capping layer on the phase formation and conversion temperatures were studied. In the second part, size effects and agglomeration of thin silicide films were investigated. The effect of different layer thicknesses on the silicidation process was studied. Additionally, the degree of agglomeration of silicide films was calculated. Furthermore, the ternary CoTiSi phase was found and identified as well as the severely limited miscibility of the monosilicides CoSi and NiSi could be shown. The CTE of NiSi between 400?700 ±C and its non-linear behavior was determined