Three Realizations and Comparison of Hardware for Piezoresistive Tactile Sensors

Tactile sensors are basically arrays of force sensors that are intended to emulate the skin in applications such as assistive robotics. Local electronics are usually implemented to reduce errors and interference caused by long wires. Realizations based on standard microcontrollers, Programmable Systems on Chip (PSoCs) and Field Programmable Gate Arrays (FPGAs) have been proposed by the authors for the case of piezoresistive tactile sensors. The solution employing FPGAs is especially relevant since their performance is closer to that of Application Specific Integrated Circuits (ASICs) than that of the other devices. This paper presents an implementation of such an idea for a specific sensor. For the purpose of comparison, the circuitry based on the other devices is also made for the same sensor. This paper discusses the implementation issues, provides details regarding the design of the hardware based on the three devices and compares them.This work has been partially funded by the Spanish Government under contracts TEC2006-12376 and TEC2009-14446

A Framework for the Detection of Crosstalk Noise in FPGAs

In recent years, crosstalk noise has emerged a serious problem because more and more devices and wires have been packed on electronic chips. As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk noise is the important phenomenon that must be taken into account. Despite of being more immune to crosstalk noise than their ASIC (application specific integrated circuit) counterparts, the dense interconnected structures of FPGAs (field programmable gate arrays) invite more vulnerabilities with crosstalk noise. Due to the lack of electrical detail concerning FPGA devices it is quite difficult to test the faults affected by crosstalk noise. This paper proposes a new approach for detecting the effects such as glitches and delays in transition that are due to crosstalk noise in FPGAs. This approach is similar to the BIST (built-in self test) technique in that it incorporates the test pattern generator to generate the test vectors and the analyzer to analyze the crosstalk faults without any overhead for testing

Implementation of Static and Semi-Static Versions of a 24+8x8 Quad-rail NULL Convention Multiply and Accumulate Unit

This paper focuses on implementing a 2s complement 8x8 dual-rail bit-wise pipelined multiplier using the asynchronous null convention logic (NCL) paradigm. The design utilizes a Wallace tree for partial product summation, and is implemented and simulated in VHDL, the transistor level, and the physical level, using a 1.8V 0.18mum TSMC CMOS process. The multiplier is realized using both static and semi-static versions of the NCL gates; and these two implementations are compared in terms of area, power, and speed

Three Realizations and Comparison of Hardware for Piezoresistive Tactile Sensors

Tactile sensors are basically arrays of force sensors that are intended to emulate the skin in applications such as assistive robotics. Local electronics are usually implemented to reduce errors and interference caused by long wires. Realizations based on standard microcontrollers, Programmable Systems on Chip (PSoCs) and Field Programmable Gate Arrays (FPGAs) have been proposed by the authors for the case of piezoresistive tactile sensors. The solution employing FPGAs is especially relevant since their performance is closer to that of Application Specific Integrated Circuits (ASICs) than that of the other devices. This paper presents an implementation of such an idea for a specific sensor. For the purpose of comparison, the circuitry based on the other devices is also made for the same sensor. This paper discusses the implementation issues, provides details regarding the design of the hardware based on the three devices and compares them

RFSoC-based front-end electronics for pulse detection

Radiation measurement relies on pulse detection, which can be performed using various configurations of high-speed analog-to-digital converters (ADCs) and field-programmable gate arrays (FPGAs). For optimal power consumption, design simplicity, system flexibility, and the availability of DSP slices, we consider the Radio Frequency System-on-Chip (RFSoC) to be a more suitable option than traditional setups. To this end, we have developed custom RFSoC-based electronics and verified its feasibility. The ADCs on RFSoC exhibit a flat frequency response of 1-125 MHz. The root-mean-square (RMS) noise level is 2.1 ADC without any digital signal processing. The digital signal processing improves the RMS noise level to 0.8 ADC (input equivalent 40 Vrms). Baseline correction via digital signal processing can effectively prevent photomultiplier overshoot after a large pulse. Crosstalk between all channels is less than -55 dB. The measured data transfer speed can support up to 32 kHz trigger rates (corresponding to 750 Mbps). Overall, our RFSoC-based electronics are highly suitable for pulse detection, and after some modifications, they will be employed in the Kamioka Liquid Scintillator Anti-Neutrino Detector (KamLAND).Comment: 14 pages, 13 figure

Data acquisition electronics and reconstruction software for directional detection of Dark Matter with MIMAC

Directional detection of galactic Dark Matter requires 3D reconstruction of low energy nuclear recoils tracks. A dedicated acquisition electronics with auto triggering feature and a real time track reconstruction software have been developed within the framework of the MIMAC project of detector. This auto-triggered acquisition electronic uses embedded processing to reduce data transfer to its useful part only, i.e. decoded coordinates of hit tracks and corresponding energy measurements. An acquisition software with on-line monitoring and 3D track reconstruction is also presented.Comment: 17 pages, 12 figure