Model-based resource analysis and synthesis of service-oriented automotive software architectures

Context Automotive software architectures describe distributed functionality by an interaction of software components. One drawback of today\u27s architectures is their strong integration into the onboard communication network based on predefined dependencies at design time. The idea is to reduce this rigid integration and technological dependencies. To this end, service-oriented architecture offers a suitable methodology since network communication is dynamically established at run-time. Aim We target to provide a methodology for analysing hardware resources and synthesising automotive service-oriented architectures based on platform-independent service models. Subsequently, we focus on transforming these models into a platform-specific architecture realisation process following AUTOSAR Adaptive. Approach For the platform-independent part, we apply the concepts of design space exploration and simulation to analyse and synthesise deployment configurations, i. e., mapping services to hardware resources at an early development stage. We refine these configurations to AUTOSAR Adaptive software architecture models representing the necessary input for a subsequent implementation process for the platform-specific part. Result We present deployment configurations that are optimal for the usage of a given set of computing resources currently under consideration for our next generation of E/E architecture. We also provide simulation results that demonstrate the ability of these configurations to meet the run time requirements. Both results helped us to decide whether a particular configuration can be implemented. As a possible software toolchain for this purpose, we finally provide a prototype. Conclusion The use of models and their analysis are proper means to get there, but the quality and speed of development must also be considered

Complex low volume electronics simulation tool to improve yield and reliability

Assembly of Printed Circuit Boards (PCB) in low volumes and a high-mix requires a level of manual intervention during product manufacture, which leads to poor first time yield and increased production costs. Failures at the component-level and failures that stem from non-component causes (i.e. system-level), such as defects in design and manufacturing, can account for this poor yield. These factors have not been incorporated in prediction models due to the fact that systemfailure causes are not driven by well-characterised deterministic processes. A simulation and analysis support tool being developed that is based on a suite of interacting modular components with well defined functionalities and interfaces is presented in this paper. The CLOVES (Complex Low Volume Electronics Simulation) tool enables the characterisation and dynamic simulation of complete design; manufacturing and business processes (throughout the entire product life cycle) in terms of their propensity to create defects that could cause product failure. Details of this system and how it is being developed to fulfill changing business needs is presented in this paper. Using historical data and knowledge of previous printed circuit assemblies (PCA) design specifications and manufacturing experiences, defect and yield results can be effectively stored and re-applied for future problem solving. For example, past PCA design specifications can be used at design stage to amend designs or define process options to optimise the product yield and service reliability

Disruptive Innovations and Disruptive Assurance: Assuring Machine Learning and Autonomy

Autonomous and machine learning-based systems are disruptive innovations and thus require a corresponding disruptive assurance strategy. We offer an overview of a framework based on claims, arguments, and evidence aimed at addressing these systems and use it to identify specific gaps, challenges, and potential solutions

Combining business process and failure modelling to increase yield in electronics manufacturing

The prediction and capturing of defects in low-volume assembly of electronics is a technical challenge that is a prerequisite for design for manufacturing (DfM) and business process improvement (BPI) to increase first-time yields and reduce production costs. Failures at the component-level (component defects) and system-level (such as defects in design and manufacturing) have not been incorporated in combined prediction models. BPI efforts should have predictive capability while supporting flexible production and changes in business models. This research was aimed at the integration of enterprise modelling (EM) and failure models (FM) to support business decision making by predicting system-level defects. An enhanced business modelling approach which provides a set of accessible failure models at a given business process level is presented in this article. This model-driven approach allows the evaluation of product and process performance and hence feedback to design and manufacturing activities hence improving first-time yield and product quality. A case in low-volume, high-complexity electronics assembly industry shows how the approach leverages standard modelling techniques and facilitates the understanding of the causes of poor manufacturing performance using a set of surface mount technology (SMT) process failure models. A prototype application tool was developed and tested in a collaborator site to evaluate the integration of business process models with the execution entities, such as software tools, business database, and simulation engines. The proposed concept was tested for the defect data collection and prediction in the described case study

Collaborative Verification-Driven Engineering of Hybrid Systems

Hybrid systems with both discrete and continuous dynamics are an important model for real-world cyber-physical systems. The key challenge is to ensure their correct functioning w.r.t. safety requirements. Promising techniques to ensure safety seem to be model-driven engineering to develop hybrid systems in a well-defined and traceable manner, and formal verification to prove their correctness. Their combination forms the vision of verification-driven engineering. Often, hybrid systems are rather complex in that they require expertise from many domains (e.g., robotics, control systems, computer science, software engineering, and mechanical engineering). Moreover, despite the remarkable progress in automating formal verification of hybrid systems, the construction of proofs of complex systems often requires nontrivial human guidance, since hybrid systems verification tools solve undecidable problems. It is, thus, not uncommon for development and verification teams to consist of many players with diverse expertise. This paper introduces a verification-driven engineering toolset that extends our previous work on hybrid and arithmetic verification with tools for (i) graphical (UML) and textual modeling of hybrid systems, (ii) exchanging and comparing models and proofs, and (iii) managing verification tasks. This toolset makes it easier to tackle large-scale verification tasks

Modelling and simulation of paradigms for printed circuit board assembly to support the UK's competency in high reliability electronics

The fundamental requirement of the research reported within this thesis is the provision of physical models to enable model based simulation of mainstream printed circuit assembly (PCA) process discrete events for use within to-be-developed (or under development) software tools which codify cause & effects knowledge for use in product and process design optimisation. To support a national competitive advantage in high reliability electronics UK based producers of aircraft electronic subsystems require advanced simulation tools which offer model based guidance. In turn, maximization of manufacturability and minimization of uncontrolled rework must therefore enhance inservice sustainability for ‘power-by-the-hour’ commercial aircraft operation business models. [Continues.

Simultaneous Multithreading and Hard Real Time: Can It Be Safe?

The applicability of Simultaneous Multithreading (SMT) to real-time systems has been hampered by the difficulty of obtaining reliable execution costs in an SMT-enabled system. This problem is addressed by introducing a scheduling framework, called CERT-MT, that combines scheduling-aware timing analysis with a cyclic-executive scheduler in a way that minimizes SMT-related timing variations. The proposed scheduling-aware timing analysis is based on maximum observed execution times and accounts for the uncertainty inherent in measurement-based timing analysis. The timing analysis is found to work for tasks with and without SMT, though some adjustments are required in the former case. A large-scale schedulability study is presented that shows CERT-MT can schedule systems with total utilizations approaching 1.4 times the core count, without sacrificing safety

Threat Repair with Optimization Modulo Theories

We propose a model-based procedure for automatically preventing security threats using formal models. We encode system models and potential threats as satisfiability modulo theory (SMT) formulas. This model allows us to ask security questions as satisfiability queries. We formulate threat prevention as an optimization problem over the same formulas. The outcome of our threat prevention procedure is a suggestion of model attribute repair that eliminates threats. Whenever threat prevention fails, we automatically explain why the threat happens. We implement our approach using the state-of-the-art Z3 SMT solver and interface it with the threat analysis tool THREATGET. We demonstrate the value of our procedure in two case studies from automotive and smart home domains, including an industrial-strength example