Robust explicit MPC design under finite precision arithmetic

We propose a design methodology for explicit Model Predictive Control (MPC) that guarantees hard constraint satisfaction in the presence of finite precision arithmetic errors. The implementation of complex digital control techniques, like MPC, is becoming increasingly adopted in embedded systems, where reduced precision computation techniques are embraced to achieve fast execution and low power consumption. However, in a low precision implementation, constraint satisfaction is not guaranteed if infinite precision is assumed during the algorithm design. To enforce constraint satisfaction under numerical errors, we use forward error analysis to compute an error bound on the output of the embedded controller. We treat this error as a state disturbance and use this to inform the design of a constraint-tightening robust controller. Benchmarks with a classical control problem, namely an inverted pendulum, show how it is possible to guarantee, by design, constraint satisfaction for embedded systems featuring low precision, fixed-point computations

Uncertainty Aware Mapping of Embedded Systems for Reliability, Performance, and Energy

Due to technology downscaling, embedded systems have increased in complexity and heterogeneity. The increasingly large process, voltage, and temperature variations negatively affect the design and optimization process of these systems. These factors contribute to increased uncertainties that in turn undermine the accuracy and effectiveness of traditional design approaches. In this thesis, we formulate the problem of uncertainty aware mapping for multicore embedded system platforms as a multi-objective optimization problem. We present a solution to this problem that integrates uncertainty models as a new design methodology constructed with Monte Carlo and evolutionary algorithms. The solution is uncertainty aware because it is able to model uncertainties in design parameters and to identify robust design points that limit the influence of these uncertainties onto the objective functions. The proposed design methodology is implemented as a tool that can generate the robust Pareto frontier in the objective space formed by reliability, performance, and energy consumption

Analysis and identification of possible automation approaches for embedded systems design flows

Sophisticated and high performance embedded systems are present in an increasing number of application domains. In this context, formal-based design methods have been studied to make the development process robust and scalable. Models of computation (MoC) allows the modeling of an application at a high abstraction level by using a formal base. This enables analysis before the application moves to the implementation phase. Different tools and frameworks supporting MoCs have been developed. Some of them can simulate the models and also verify their functionality and feasibility before the next design steps. In view of this, we present a novel method for analysis and identification of possible automation approaches applicable to embedded systems design flow supported by formal models of computation. A comprehensive case study shows the potential and applicability of our method11212

Delay-Based Controller Design for Continuous-Time and Hybrid Applications

Motivated by the availability of different types of delays in embedded systems and biological circuits, the objective of this work is to study the benefits that delay can provide in simplifying the implementation of controllers for continuous-time systems. Given a continuous-time linear time-invariant (LTI) controller, we propose three methods to approximate this controller arbitrarily precisely by a simple controller composed of delay blocks, a few integrators and possibly a unity feedback. Different problems associated with the approximation procedures, such as finding the optimal number of delay blocks or studying the robustness of the designed controller with respect to delay values, are then investigated. We also study the design of an LTI continuous-time controller satisfying given control objectives whose delay-based implementation needs the least number of delay blocks. A direct application of this work is in the sampled-data control of a real-time embedded system, where the sampling frequency is relatively high and/or the output of the system is sampled irregularly. Based on our results on delay-based controller design, we propose a digital-control scheme that can implement every continuous-time stabilizing (LTI) controller. Unlike a typical sampled-data controller, the hybrid controller introduced here -— consisting of an ideal sampler, a digital controller, a number of modified second-order holds and possibly a unity feedback -— is robust to sampling jitter and can operate at arbitrarily high sampling frequencies without requiring expensive, high-precision computation

A NOVEL MESSAGE ROUTING LAYER FOR THE COMMUNICATION MANAGEMENT OF DISTRIBUTED EMBEDDED SYSTEMS

Fault tolerant and distributed embedded systems are research areas that have the interest of such entities as NASA, the Department of Defense, and various other government agencies, corporations, and universities. Taking a system and designing it to work in the presence of faults is appealing to these entities as it inherently increases the reliability of the deployed system. There are a few different fault tolerant techniques that can be implemented in a system design to handle faults as they occur. One such technique is the reconfiguration of a portion of the system to a redundant resource. This is a difficult task to manage within a distributed embedded system because of the distributed, directly addressed data producer and consumer dependencies that exist in common network infrastructures. It is the goal of this thesis work to develop a novel message routing layer for the communication management of distributed embedded systems that reduces the complexity of this problem. The resulting product of this thesis provides a robust approach to the design, implementation, integration, and deployment of a distributed embedded system