A golden block based self-refining scheme for repetitive patterned wafer inspections

This paper presents a novel technique for detecting possible defects in two-dimensional wafer images with repetitive patterns using prior knowledge. It has a learning ability that is able to create a golden block database from the wafer image itself, modify and refine its content when used in further inspections. The extracted building block is stored as a golden block for the detected pattern. When new wafer images with the same periodical pattern arrives, we do not have to re-calculate its periods and building block. A new building block can be derived directly from the existing golden block after eliminating alignment differences. If the newly derived building block has better quality than the stored golden block, then the golden block is replaced with the new building block. With the proposed algorithm, our implementation shows that a significant amount of processing time is saved. And the storage overhead of golden templates is also reduced significantly by storing golden blocks only

A golden template self-generating method for patterned wafer inspection

This paper presents a novel golden template self-generating technique for detecting possible defects in periodic two-dimensional wafer images. A golden template of the patterned wafer image under inspection can be obtained from the wafer image itself and no other prior knowledge is needed. It is a bridge between the existing self-reference methods and image-to-image reference methods. Spectral estimation is used in the first step to derive the periods of repeating patterns in both directions. Then a building block representing the structure of the patterns is extracted using interpolation to obtain sub-pixel resolution. After that, a new defect-free golden template is built based on the extracted building block. Finally, a pixel-to-pixel comparison is all we need to find out possible defects. A comparison between the results of the proposed method and those of the previously published methods is presented

Visual Inspection Algorithms for Printed Circuit Board Patterns A SURVEY

The importance of the inspection process has been magnified by the requirements of the modern manufacturing environment. In electronics mass-production manufacturing facilities, an attempt is often made to achieve 100 % quality assurance of all parts, subassemblies, and finished goods. A variety of approaches for automated visual inspection of printed circuits have been reported over the last two decades. In this survey, algorithms and techniques for the automated inspection of printed circuit boards are examined. A classification tree for these algorithms is presented and the algorithms are grouped according to this classification. This survey concentrates mainly on image analysis and fault detection strategies, these also include the state-of-the-art techniques. Finally, limitations of current inspection systems are summarized

Comparison of processing-induced deformations of InP bonded to Si determined by e-beam metrology: direct vs. adhesive bonding

In this paper, we employ an electron beam writer as metrology tool to investigate distortion of an exposed pattern of alignment marks in heterogeneously bonded InP on silicon. After experimental study of three different bonding and processing configurations which represent typical on-chip photonic device fabrication conditions, the smallest degree of linearly-corrected distortion errors is obtained for the directly bonded wafer, with the alignment marks both formed and measured on the same InP layer side after bonding (equivalent to single-sided processing of the bonded layer). Under these conditions, multilayer exposure alignment accuracy is limited by the InP layer deformation after the initial pattern exposure mainly due to the mechanical wafer clamping in the e-beam cassette. Bonding-induced InP layer deformations dominate in cases of direct and BCB bonding when the alignment marks are formed on one InP wafer side, and measured after bonding and substrate removal from another (equivalent to double-sided processing of the bonded layer). The findings of this paper provide valuable insight into the origin of the multilayer exposure misalignment errors for the bonded III-V on Si wafers, and identify important measures that need to be taken to optimize the fabrication procedures for demonstration of efficient and high-performance on-chip photonic integrated devices.Comment: 7 pages, 6 figure

Development of CUiris: A Dark-Skinned African Iris Dataset for Enhancement of Image Analysis and Robust Personal Recognition

Iris recognition algorithms, especially with the emergence of large-scale iris-based identification systems, must be tested for speed and accuracy and evaluated with a wide range of templates – large size, long-range, visible and different origins. This paper presents the acquisition of eye-iris images of dark-skinned subjects in Africa, a predominant case of verydark- brown iris images, under near-infrared illumination. The peculiarity of these iris images is highlighted from the histogram and normal probability distribution of their grayscale image entropy (GiE) values, in comparison to Asian and Caucasian iris images. The acquisition of eye-images for the African iris dataset is ongoing and will be made publiclyavailable as soon as it is sufficiently populated

Index to 1981 NASA Tech Briefs, volume 6, numbers 1-4

Short announcements of new technology derived from the R&D activities of NASA are presented. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This index for 1981 Tech Briefs contains abstracts and four indexes: subject, personal author, originating center, and Tech Brief Number. The following areas are covered: electronic components and circuits, electronic systems, physical sciences, materials, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences

Influence of material quality and process-induced defects on semiconductor device performance and yield

An overview of major causes of device yield degradation is presented. The relationships of device types to critical processes and typical defects are discussed, and the influence of the defect on device yield and performance is demonstrated. Various defect characterization techniques are described and applied. A correlation of device failure, defect type, and cause of defect is presented in tabular form with accompanying illustrations

The Use of a Convolutional Neural Network in Detecting Soldering Faults from a Printed Circuit Board Assembly

Automatic Optical Inspection (AOI) is any method of detecting defects during a Printed Circuit Board (PCB) manufacturing process. Early AOI methods were based on classic image processing algorithms using a reference PCB. The traditional methods require very complex and inflexible preprocessing stages. With recent advances in the field of deep learning, especially Convolutional Neural Networks (CNN), automating various computer vision tasks has been established. Limited research has been carried out in the past on using CNN for AOI. The present systems are inflexible and require a lot of preprocessing steps or a complex illumination system to improve the accuracy. This paper studies the effectiveness of using CNN to detect soldering bridge faults in a PCB assembly. The paper presents a method for designing an optimized CNN architecture to detect soldering faults in a PCBA. The proposed CNN architecture is compared with the state-of-the-art object detection architecture, namely YOLO, with respect to detection accuracy, processing time, and memory requirement. The results of our experiments show that the proposed CNN architecture has a 3.0% better average precision, has 50% less number of parameters and infers in half the time as YOLO. The experimental results prove the effectiveness of using CNN in AOI by using images of a PCB assembly without any reference image, any complex preprocessing stage, or a complex illumination system. Doi: 10.28991/HIJ-2022-03-01-01 Full Text: PD