A two-step multiuser detection scheme for space-time coded MIMO OFDM systems

In this paper, we investigate transceiver design for a wideband multiuser-multiple-input, multiple-output (MIMO) communication system, where the co-channel users are equipped with multiple transmit and multiple receive antennas. In particular, we develop a two-step hard-decision interference cancellation receiver for a multiuser-MIMO uplink system which employs orthogonal frequency division multiplexing (OFDM) modulation and space-time block codes (STBC). The STBC has been implemented either over adjacent tones or adjacent OFDM symbols and the performances of both implementations have been tested under slowly time-varying channels. The two-step receiver structure has been implemented using a combined interference suppression scheme based on minimum mean-squared error (MMSE) and symbol-wise likelihood detectors, which is then followed by an interference cancellation step. The receiver can suppress and cancel the interference from the co-channel users effectively without increasing the complexity significantly. The paper also includes computer experiments that are intended to improve the understanding of specific issues involved in the design of multiuser STBC-OFDM systems

Efficient DSP and Circuit Architectures for Massive MIMO: State-of-the-Art and Future Directions

Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio (NR) and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely energy-efficient implementations. These exploit opportunities in deeply-scaled silicon technologies and perform partly distributed processing to cope with the bottlenecks encountered in the interconnection of many signals. For example, prototype ASIC implementations have demonstrated zero-forcing precoding in real time at a 55 mW power consumption (20 MHz bandwidth, 128 antennas, multiplexing of 8 terminals). Coarse and even error-prone digital processing in the antenna paths permits a reduction of consumption with a factor of 2 to 5. This article summarizes the fundamental technical contributions to efficient digital signal processing for Massive MIMO. The opportunities and constraints on operating on low-complexity RF and analog hardware chains are clarified. It illustrates how terminals can benefit from improved energy efficiency. The status of technology and real-life prototypes discussed. Open challenges and directions for future research are suggested.Comment: submitted to IEEE transactions on signal processin