Design of Analog CMOS Circuits for Batteryless Implantable Telemetry Systems

A wireless biomedical telemetry system is a device that collects biomedical signal measurements and transmits data through wireless RF communication. Testing medical treatments often involves experimentation on small laboratory animals, such as genetically modified mice and rats. Using batteries as a power source results in many practical issues, such as increased size of the implant and limited operating lifetime. Wireless power harvesting for implantable biomedical devices removes the need for batteries integrated into the implant. This will reduce device size and remove the need for surgical replacement due to battery depletion. Resonant inductive coupling achieves wireless power transfer in a manner modelled by a step down transformer. With this methodology, power harvesting for an implantable device is realized with the use of a large primary coil external to the subject, and a smaller secondary coil integrated into the implant. The signal received from the secondary coil must be regulated to provide a stable direct current (DC) power supply, which will be used to power the electronics in the implantable device. The focus of this work is on development of an electronic front-end for wireless powering of an implantable biomedical device. The energy harvesting front-end circuit is comprised of a rectifier, LDO regulator, and a temperature insensitive voltage reference. Physical design of the front-end circuit is developed in 0.13um CMOS technology with careful attention to analog layout issues. Post-layout simulation results are presented for each sub-block as well as the full front-end structure. The LDO regulator operates with supply voltages in the range of 1V to 1.5V with quiescent current of 10.5uA The complete power receiver front-end has a power conversion efficiency of up to 29%

An Ultra Low Power Voltage Regulator for RFID Application

An ultra low power and low voltage regulator for radio-frequency identification (RFID) passive tags is designed and optimized in this thesis. It consists of a low power sub-1V reference voltage generator with temperature and supply voltage ripple compensation, and a low-dropout voltage (LDO) regulator. The circuits are designed in CMOS 65nm technology. The total quiescent current of 63.8nA at 1.5V supply voltage has been achieved using properly sized transistors operating in the subthreshold region. With the low voltage property of transistors operating in subthreshold region the output regulated voltage can easily achieve 1V with load capacity of 50uA. Self-biased current sources are employed and optimized to eliminate the effect of supply voltage variation and to achieve a line regulation of 4.06mV/V. A PMOS pass device with small output resistance is used to reduce the load regulation to 6.57mV/50uA. By utilizing subthreshold properties, the temperature coefficient is reduced to 12.7 and 31ppm/°C for the reference voltage and regulated voltage, respectively. The circuits can operate well from -30°C to 50°C, a typical temperature range of the environment where RFID tags are widely deployed

Low-power switched capacitor voltage reference

Low-power analog design represents a developing technological trend as it emerges from a rather limited range of applications to a much wider arena affecting mainstream market segments. It especially affects portable electronics with respect to battery life, performance, and physical size. Meanwhile, low-power analog design enables technologies such as sensor networks and RFID. Research opportunities abound to exploit the potential of low power analog design, apply low-power to established fields, and explore new applications. The goal of this effort is to design a low-power reference circuit that delivers an accurate reference with very minimal power consumption. The circuit and device level low-power design techniques are suitable for a wide range of applications. To meet this goal, switched capacitor bandgap architecture was chosen. It is the most suitable for developing a systematic, and groundup, low-power design approach. In addition, the low-power analog cell library developed would facilitate building a more complex low-power system. A low-power switched capacitor bandgap was designed, fabricated, and fully tested. The bandgap generates a stable 0.6-V reference voltage, in both the discrete-time and continuous-time domain. The system was thoroughly tested and individual building blocks were characterized. The reference voltage is temperature stable, with less than a 100 ppm/°C drift, over a --60 dB power supply rejection, and below a 1 [Mu]A total supply current (excluding optional track-and-hold). Besides using it as a voltage reference, potential applications are also described using derivatives of this switched capacitor bandgap, specifically supply supervisory and on-chip thermal regulation

Nanopower CMOS transponders for UHF and microwave RFID systems

At first, we present an analysis and a discussion of the design options and tradeoffs for a passive microwave transponder. We derive a set of criteria for the optimization of the voltage multiplier, the power matching network and the backscatter modulator in order to optimize the operating range. In order to match the strictly power requirements, the communication protocol between transponder and reader has been chosen in a convenient way, in order to make the architecture of the passive transponder very simple and then ultra-low-power. From the circuital point of view, the digital section has been implemented in subthreshold CMOS logic with very low supply voltage and clock frequency. We present different solutions to supply power to the transponder, in order to keep the power consumption in the deep sub-µW regime and to drastically reduce the huge sensitivity of the subthreshold logic to temperature and process variations. Moreover, a low-voltage and low-power EEPROM in a standard CMOS process has been implemented. Finally, we have presented the implementation of the entire passive transponder, operating in the UHF or microwave frequency range

A Class-E Inductive Powering Link with Backward Data Communications for Implantable Sensor Systems

The design and implementation of a wireless power and data transfer system based on inductive coupling, having the potential to be used in numerous implantable bio-medical sensors and systems, is presented. The system consists of an external (primary) unit and an internal (secondary) unit. The external unit incorporates a high-efficiency switch-mode Class-E amplifier operating at ~200 kHz for driving the primary coil. The secondary unit consists of a parallel resonant coil followed by the power recovery circuitry. Means for backward data communication from the internal to the external unit over the same pair of coils has been realized using a simple FSK-based modulation scheme incorporated into the internal unit. FSK demodulation and associated filtering are integrated with the base inductive powering system. Prototype system test results indicate the inductive link efficiency can exceed 80% under optimum operating conditions with the overall power transfer efficiency of approximately 30%. The communication system is capable of transmitting up to 10kbps of data with the FSK carrier frequency (i.e., middle-frequency) being only 120kHz. The complete system functions reliably over an inter-coil distances exceeding 2.5cm with a 5V dc supply

Low-Noise Energy-Efficient Sensor Interface Circuits

Today, the Internet of Things (IoT) refers to a concept of connecting any devices on network where environmental data around us is collected by sensors and shared across platforms. The IoT devices often have small form factors and limited battery capacity; they call for low-power, low-noise sensor interface circuits to achieve high resolution and long battery life. This dissertation focuses on CMOS sensor interface circuit techniques for a MEMS capacitive pressure sensor, thermopile array, and capacitive microphone. Ambient pressure is measured in the form of capacitance. This work propose two capacitance-to-digital converters (CDC): a dual-slope CDC employs an energy efficient charge subtraction and dual comparator scheme; an incremental zoom-in CDC largely reduces oversampling ratio by using 9b zoom-in SAR, significantly improving conversion energy. An infrared gesture recognition system-on-chip is then proposed. A hand emits infrared radiation, and it forms an image on a thermopile array. The signal is amplified by a low-noise instrumentation chopper amplifier, filtered by a low-power 30Hz LPF to remove out-band noise including the chopper frequency and its harmonics, and digitized by an ADC. Finally, a motion history image based DSP analyzes the waveform to detect specific hand gestures. Lastly, a microphone preamplifier represents one key challenge in enabling voice interfaces, which are expected to play a dominant role in future IoT devices. A newly proposed switched-bias preamplifier uses switched-MOSFET to reduce 1/f noise inherently.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137061/1/chaseoh_1.pd

2.45ghz Rf-front End for a Micro Neural Interface System

Active implants inside the human body must be capable of performing their intended function for decades without replacement with minimal tissue heating. It is therefore necessary for them to efficiently operate reliably in a battery free environment at very low power levels. Traditionally inductive coupling has been the preferred choice of power transfer to the active implants. Inductive coupling suffers from bandwidth and alignment issues that limit their usefulness for distributed sensor systems. The ability to use both near-field and far-field RF to power and communicate with sensors distributed in the body would provide a major advance in implantable device technology. Recent advances in wafer packaging technologies and advanced VLSI processes offer the possibility of highly reliable system on chip (SOC) solutions using RF energy as a source to power the active implants. In this paper we present a CMOS VLSI implementation of a front end system for a RFID Sensor (RFIDS) capable of harvesting up to 42�W at -3dBm power levels and providing 700mV and 400mV regulated DC voltages under 50 �A and 4�A continuous load currents respectively. In addition the RFIDS contains both an AM demodulator and a 400mV voltage reference. The RF front end chip occupies an area of 2.32 mm2 and has been fabricated in 180nm IBM CMRF7SF processSchool of Electrical & Computer Engineerin

A low power signal front-end for passive UHF RFID transponders with a new clock recovery circuit.

Chan, Chi Fat.Thesis (M.Phil.)--Chinese University of Hong Kong, 2009.Includes bibliographical references.Abstracts in English and Chinese.Abstract --- p.2摘要 --- p.5Acknowledgement --- p.7Table of Contents --- p.9List of Figures --- p.11List of Tables --- p.14Chapter 1. --- Introduction --- p.15Chapter 1.2. --- Research Objectives --- p.16Chapter 1.3. --- Thesis Organization --- p.18Chapter 1.4. --- References --- p.19Chapter 2. --- Overview of Passive UHF RFID Transponders --- p.20Chapter 2.1. --- Types of RFID Transponders and Design Challenges of Passive RFID Transponder --- p.20Chapter 2.2. --- Selection of Carrier Frequency --- p.22Chapter 2.3. --- Description of Transponder Construction --- p.22Chapter 2.3.1. --- Power-Generating Circuits --- p.23Chapter 2.3.2. --- Base Band Processor --- p.28Chapter 2.3.3. --- Signal Front-End --- p.29Chapter 2.4. --- Summary --- p.30Chapter 2.5. --- References --- p.31Chapter 3. --- ASK Demodulator for EPC C-l G-2 Transponder --- p.32Chapter 3.1. --- ASK Demodulator Design Considerations --- p.32Chapter 3.1.1. --- Recovered Envelope Distortion --- p.32Chapter 3.1.2. --- Input Power Level Considerations --- p.34Chapter 3.1.3. --- Input RF power Intercepted by ASK Demodulator --- p.36Chapter 3.2. --- ASK Demodulator Design From [3-4] --- p.36Chapter 3.2.1. --- Envelope Waveform Recovery Design --- p.37Chapter 3.2.1.1. --- Voltage Multiplier Branch for Generating Venv --- p.39Chapter 3.2.1.2. --- Voltage Multiplier Branch for Generating Vref --- p.41Chapter 3.2.2. --- Design Considerations for Sensitivity of ASK Demodulator --- p.41Chapter 3.2.3. --- RF Input Power Sharing with Voltage Multiplier --- p.44Chapter 3.2.4. --- ASK Demodulator and Voltage Multiplier Integrated Estimations for Maximum RF Power Input --- p.47Chapter 3.2.5. --- Measurement result and Discussion --- p.49Chapter 3.3. --- Proposed Envelope Detector Circuit --- p.52Chapter 3.3.1. --- Sensitivity Estimation --- p.52Chapter 3.3.2. --- Maximum Tolerable Input Power Estimation --- p.53Chapter 3.3.3. --- Envelope Waveform Recovery of the Proposed Envelope Detector --- p.54Chapter 3.4. --- Summary --- p.57Chapter 3.5. --- References --- p.58Chapter 4. --- Clock Generator for EPC C-l G-2 Transponder --- p.59Chapter 4.1. --- Design Challenges Overview of Clock Generator --- p.59Chapter 4.2. --- Brief Review of PIE Symbols in EPC C1G2 Standard --- p.62Chapter 4.3. --- Proposed Clock Recovery Circuit Based on PIE Symbols for Clock Frequency Calibration --- p.64Chapter 4.3.1. --- Illustration on PIE Symbols for Clock Frequency Calibration --- p.64Chapter 4.3.2. --- Symbol time-length counter --- p.72Chapter 4.3.3. --- The M2.56MHZ Reference Generator and Sampling Frequency Requirement --- p.75Chapter 4.3.4. --- Symbol Length Reconfiguration for Different Tari and FLL Stability --- p.80Chapter 4.3.5. --- Frequency Detector and Loop Filter --- p.83Chapter 4.3.6. --- Proposed DCO Design --- p.84Chapter 4.3.7. --- Measurement Results and Discussions --- p.88Chapter 4.3.7.1. --- Frequency Calibration Measurement Results --- p.89Chapter 4.3.7.2. --- Number x and Tari Variation --- p.92Chapter 4.3.7.3. --- Temperature and Supply Variation --- p.93Chapter 4.3.7.4. --- Transient Supply Variation --- p.94Chapter 4.3.8. --- Works Comparison --- p.95Chapter 4.4. --- Clock Generator with Embedded PIE Decoder --- p.96Chapter 4.4.1. --- Clock Generator for Transponder Review --- p.96Chapter 4.4.2. --- PIE Decoder Review --- p.97Chapter 4.4.3. --- Proposed Clock Generator with Embedded PIE Decoder --- p.97Chapter 4.4.4. --- Measurement Results and Discussions --- p.100Chapter 4.5. --- Summary --- p.103Chapter 4.6. --- References --- p.105Chapter 5. --- ASK Modulator --- p.107Chapter 5.1. --- Introduction to ASK Modulator in RFD Transponder --- p.107Chapter 5.2. --- ASK Modulator Design --- p.109Chapter 5.3. --- ASK Modulator Measurement --- p.110Chapter 5.4. --- Summary --- p.113Chapter 5.5. --- References --- p.113Chapter 6. --- Conclusions --- p.114Chapter 6.1. --- Contribution --- p.114Chapter 6.2. --- Future Development --- p.11