38 research outputs found

    Deadline scheduling in a multiprogrammed computer environment

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    A Queueing Model for A Multiprocessor System with Partitioned Memory

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    Concurrent object-oriented programming: The MP-Eiffel approach

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    This article evaluates several possible approaches for integrating concurrency into object-oriented programming languages, presenting afterwards, a new language named MP-Eiffel. MP-Eiffel was designed attempting to include all the essential properties of both concurrent and object-oriented programming with simplicity and safety. A special care was taken to achieve the orthogonality of all the language mechanisms, allowing their joint use without unsafe side-effects (such as inheritance anomalies)

    Easy Cases of Deadlock Detection in Train Scheduling

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    A deadlock occurs when two or more trains are preventing each other from moving forward by occupying the required tracks. Deadlocks are rare but pernicious events in railroad operations and, in most cases, are caused by human errors. Recovering is a time-consuming and costly operation, producing large delays and often requiring crew rescheduling and complex switching moves. In practice, most deadlocks involve only two long trains missing their last potential meet location. In this paper, we prove that, for any network configuration, the identification of two-train deadlocks can be performed in polynomial time. This is the first exact polynomial algorithm for such a practically relevant combinatorial problem. We also develop a pseudo-polynomial but efficient oracle that allows real-time early detection and prevention of any (potential) two-train deadlock in the Union Pacific (a U.S. class 1 rail company) railroad network. A deadlock prevention module based on the work in this paper will be put in place at Union Pacific to prevent all deadlocks of this kind.acceptedVersio

    A Scalable, Sound, Eventually-Complete Algorithm for Deadlock Immunity

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    We introduce the concept of deadlock immunity—a program's ability to avoid all deadlocks that match patterns of deadlocks experienced in the past. We present here an algorithm for enabling large software systems to automatically acquire such immunity without any programmer assistance. We prove that the algorithm is sound and complete with respect to the immunity property. We implemented the algorithm as a tool for Java programs, and measurements show it introduces only modest performance overhead in real, large applications like JBoss. Deadlock immunity is as useful as complete freedom from deadlocks in many practical cases, so we see the present algorithm as a pragmatic step toward ridding complex concurrent programs of their deadlocks

    A graph model for coordinating systems of tasks

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    Microprocessor based modular support for an operating system

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    A technique to support the operating system has been presented. The approach utilizes a modular microprocessor based support system to parallel process and/or assist some operating system funtional units. Adopting the proposed technique may result in reducing the amount of processing power devoted to the execution of the operating system code as well as in reducing overall system cost;Two application examples of the proposed technique have been invented. The first is a support module for Habermann\u27s deadlock avoidance algorithm. Without the support module, the algorithm would have an execution time O(m(\u272)), where m is the number of processes in the system. The design and operation of a support module that employs m + 1 microprocessors and is capable of performing the algorithm with an execution time O(m) has been described. Another module utilizes (m/k) + 1 microprocessors, and has an execution time O(km), k \u3e 1, has been discussed. This latter module is suitable when m is very large. A fast module that has an execution time O(km), k \u3c 1, and is appropriate for systems with small m has also been discussed;The second application example is a support module for the exact implementation of the Least Recently Used (LRU) replacement policy in a demand paging memory management system. It was believed that the exact implementation of the LRU was not feasible because it would represent a tremendous overhead. This is no longer true if the proposed technique is considered. A submodule that employs an MC68000 microprocessor was designed and built to execute the exact LRU function. To test the submodule, it was found necessary to build an address stream generator module to simulate the main system. Therefore, an address stream generation module was built around another MC68000 microprocessor. The LRU submodule was then extensively tested under different address arrival rates. The data obtained from the experiments prove the feasibility of implementing the exact LRU algorithm at a very low cost. It also largely endorses the proposed support technique

    FORMULARY MODEL FOR ACCESS CONTROL AND PRIVACY IN COMPUTER SYSTEMS.

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