Analog Circuits for Computing

This project entails designing, simulating, and verifying analog circuits that can perform essential computing functions for power systems applications. The project aims to remedy critical challenges associated with handling calculations digitally, namely, time and power. This project\u27s scope includes creating a library of circuits in SPICE that can be used to model and simulate complex mathematical equations. From these SPICE models, the circuit can be constructed physically, where the solution can be generated in less time using less power than doing the computation digitally. The performance and efficiency of analog computing will be measured and compared to conventional digital methods

Transmission line modeling for the purpose of analog power flow computation of large scale power systems

This thesis proposes methods for modeling electric power transmission lines for the purpose of analog power flow computation of power system networks. Theoretical and applicable circuit models for analog transmission lines are presented with a focus on power-flow studies which concentrates on the steady state or static behavior of electrical power transmission lines. With this approach the wave propagation and reflection is not as much of a concern as the steady state line voltages and current flows. Because of this lumped circuit equivalent line models are utilized. The primary goal is to develop a computational alternative for power system analysis that overcomes obstacles currently faced by traditional digital computation methods. Analog computation is proving to be a viable alternative and has notable advantages over digital computers. In order to contrive a practical analog emulator precise models for power system components are required. Specifically this thesis develops a realization of an electric power transmission line model for such a purpose.The transmission line model traditionally utilized in power-flow computation is a lumped parameter pi-model equivalent circuit. In digital computation the shunt elements and sometimes the series resistances are often times neglected in order to simplify the power flow equations and subsequently speed up the calculation times. Prior research in analog computation for power flow analysis also utilized these simplified line models. A fully reconfigurable pi-model is presented here for an analog computation approach. No components have been neglected resulting in a more accurate line model with fast computation times. The ability to remotely reconfigure each component on the line model makes this model universal. The design could easily be fabricated to an integrated circuit to represent a large scale network and configured to match a real world system. In addition, the model is easily expanded to form a distributed parameter line model by interconnecting multiple components in series. This allows for computational analysis of the power system states throughout the transmission line which is traditionally not done in digital power flow computation due to computational restraints.M.S., Electrical Engineering -- Drexel University, 200

Analog methods for power system analysis and load modeling

This dissertation explores how and why analog computation may be utilized to study several aspects of power system load behavior. An analog computer is one which utilizes continuous electrical signals instead of discrete bits, 0’s and 1’s, to represent numerical values. Generally, it is utilized to solve a set of complex nonlinear differential equations: a process referred to as analog emulation. In the first chapters, this work examines how load may be represented in a modern analog computer designed to emulate the behavior of a multi-bus power system and perform fast power-flow analysis. Focus is placed on the design, testing, and fabrication of a printer circuit (PC) board for this purpose. In later chapters, it examines the effect of system size and model complexity on analog and hybrid (combination of analog and digital hardware) computation times. Focus is placed on static security analysis (SSA) as well as a method to minimize these computation times through reduced actuation and data acquisition. In the final chapters, this work examines how analog hardware may be utilized to perform measurement-based composite load modeling. Focus is placed on the theory, design, and testing of an analog circuit to estimate the parameters of an assumed load model from network observation. The accuracy of a power-flow analysis is only as accurate as the models and parameters that it utilizes. For this reason, the utilization of analog hardware to both represent load in power-flow analysis (state determination) and model load behavior (parameter estimation) are addressed in this dissertation.Ph.D., Electrical Engineering -- Drexel University, 200

Power system security assessment through analog computation

This dissertation proposes a methodology for power system security assessment through analog computation. By exploiting the strengths of analog computation a more robust security assessment can be performed as compared to traditional methods. Security assessment is currently performed by power system operators utilizing digital computers and determines the power system structure, states and level of security based on telemetered data and knowledge of the system. Ideally this process would occur in real time but due to the limitations of digital computers and telemetry systems the security assessment is currently conducted at periodic intervals of ten to fifteen minutes. This process requires a tremendous amount of computation for large systems. In order to provide updated assessment at such time intervals, not even in real time, numerous assumptions and simplifications of the power system models and analyses are required to simplify and speed up the digital computations. Due to its inherent speed and computational efficiency analog computation is proving to be a viable alternative.Analog computation by definition is continuous in time and embodies an entirely different paradigm to computing as compared to discrete time methods. Security assessment for digital computers consists of topology estimations, state estimation and contingency analysis. The theory and practical approaches to these tasks through digital, discrete time, computational methods are fairly mature at this point in time but do not translate directly to analog computation. A robust analog computation engine along with corresponding computational theory is required in order to make use of analog methods for power system security assessment. This dissertation provides the relevant theory, hardware realization and application of an analog computer for power system security assessment.Ph.D., Electrical Engineering -- Drexel University, 200

A mixed-signal computer architecture and its application to power system problems

Radical changes are taking place in the landscape of modern power systems. This massive shift in the way the system is designed and operated has been termed the advent of the ``smart grid''. One of its implications is a strong market pull for faster power system analysis computing. This work is concerned in particular with transient simulation, which is one of the most demanding power system analyses. This refers to the imitation of the operation of the real-world system over time, for time scales that cover the majority of slow electromechanical transient phenomena. The general mathematical formulation of the simulation problem includes a set of non-linear differential algebraic equations (DAEs). In the algebraic part of this set, heavy linear algebra computations are included, which are related to the admittance matrix of the topology. These computations are a critical factor to the overall performance of a transient simulator. This work proposes the use of analog electronic computing as a means of exceeding the performance barriers of conventional digital computers for the linear algebra operations. Analog computing is integrated in the frame of a power system transient simulator yielding significant computational performance benefits to the latter. Two hybrid, analog and digital computers are presented. The first prototype has been implemented using reconfigurable hardware. In its core, analog computing is used for linear algebra operations, while pipelined digital resources on a field programmable gate array (FPGA) handle all remaining computations. The properties of the analog hardware are thoroughly examined, with special attention to accuracy and timing. The application of the platform to the transient analysis of power system dynamics showed a speedup of two orders of magnitude against conventional software solutions. The second prototype is proposed as a future conceptual architecture that would overcome the limitations of the already implemented hardware, while retaining its virtues. The design space of this future architecture has been thoroughly explored, with the help of a software emulator. For one possible suggested implementation, speedups of four orders of magnitude against software solvers have been observed for the linear algebra operations

Power System on a Chip (PSoC

Abstract — This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper will review various problems and proposed solutions encountered from the design stage to PC-board hardware implementation to anticipated VLSI implementation. It has already been noted that using analog emulation for power system analysis allows for reduction in computation time, without significant loss in accuracy, compared to numerical methods. This is further validated in this paper through observations obtained from comparative runs between software and analog hardware environments. I

Power system on a chip (PSoC): analog emulation for power system applications

Paper presented at 2006 IEEE Power Engineering Society General Meeting, PES, Montreal, Quebec, Canada.This contribution addresses VLSI-based hardware analog emulators of power systems. The goal is to develop a computational tool we refer to as a Power System on a Chip (PSoC). We review various problems and proposed solutions encountered from the design stage to the PC-board hardware implementation stage and finally to the anticipated VLSI implementation stage. In addition to various characteristic features, it has already been noted that using analog emulation for power system analysis allows for reduction in computation time, without significant loss in accuracy, compared to numerical methods. We further validate this through observations obtained from comparative runs between software and analog hardware environments