Architecture, design, and modeling of the OPSnet asynchronous optical packet switching node

An all-optical packet-switched network supporting multiple services represents a long-term goal for network operators and service providers alike. The EPSRC-funded OPSnet project partnership addresses this issue from device through to network architecture perspectives with the key objective of the design, development, and demonstration of a fully operational asynchronous optical packet switch (OPS) suitable for 100 Gb/s dense-wavelength-division multiplexing (DWDM) operation. The OPS is built around a novel buffer and control architecture that has been shown to be highly flexible and to offer the promise of fair and consistent packet delivery at high load conditions with full support for quality of service (QoS) based on differentiated services over generalized multiprotocol label switching

Quality of Service over Specific Link Layers: state of the art report

The Integrated Services concept is proposed as an enhancement to the current Internet architecture, to provide a better Quality of Service (QoS) than that provided by the traditional Best-Effort service. The features of the Integrated Services are explained in this report. To support Integrated Services, certain requirements are posed on the underlying link layer. These requirements are studied by the Integrated Services over Specific Link Layers (ISSLL) IETF working group. The status of this ongoing research is reported in this document. To be more specific, the solutions to provide Integrated Services over ATM, IEEE 802 LAN technologies and low-bitrate links are evaluated in detail. The ISSLL working group has not yet studied the requirements, that are posed on the underlying link layer, when this link layer is wireless. Therefore, this state of the art report is extended with an identification of the requirements that are posed on the underlying wireless link, to provide differentiated Quality of Service

Centralized vs distributed communication scheme on switched ethernet for embedded military applications

Current military communication network is a generation old and is no longer effective in meeting the emerging requirements imposed by the future embedded military applications. Therefore, a new interconnection system is needed to overcome these limitations. Two new communication networks based upon Full Duplex Switched Ethernet are presented herein in this aim. The first one uses a distributed communication scheme where equipments can emit their data simultaneously, which clearly improves system’s throughput and flexibility. However, migrating all existing applications into a compliant form could be an expensive step. To avoid this process, the second proposal consists in keeping the current centralized communication scheme. Our objective is to assess and compare the real time guarantees that each proposal can offer. The paper includes the functional description of each proposed communication network and a military avionic application to highlight proposals ability to support the required time constrained communications

Survey of switching techniques in high-speed networks and their performance

One of the most promising approaches for high speed networks for integrated service applications is fast packet switching, or ATM (Asynchronous Transfer Mode). ATM can be characterized by very high speed transmission links and simple, hard wired protocols within a network. To match the transmission speed of the network links, and to minimize the overhead due to the processing of network protocols, the switching of cells is done in hardware switching fabrics in ATM networks.A number of designs has been proposed for implementing ATM switches. While many differences exist among the proposals, the vast majority of them is based on self-routing multi-stage interconnection networks. This is because of the desirable features of multi-stage interconnection networks such as self-routing capability and suitability for VLSI implementation.Existing ATM switch architectures can be classified into two major classes: blocking switches, where blockings of cells may occur within a switch when more than one cell contends for the same internal link, and non-blocking switches, where no internal blocking occurs. A large number of techniques has also been proposed to improve the performance of blocking and nonblocking switches. In this paper, we present an extensive survey of the existing proposals for ATM switch architectures, focusing on their performance issues

Survey of traffic control schemes and error control schemes for ATM networks

Among the techniques proposed for B-ISDN transfer mode, ATM concept is considered to be the most promising transfer technique because of its flexibility and efficiency. This paper surveys and reviews a number of topics related to ATM networks. Those topics cover congestion control, provision of multiple classes of traffic, and error control. Due to the nature of ATM networks, those issues are far more challenging than in conventional networks. Sorne of the more promising solutions to those issues are surveyed, and the corresponding results on performance are summarized. Future research problems in ATM protocol aspect are also presented

Implementation of QoS onto virtual bus network

Quality of Service (QoS) is a key issue in a multimedia environment because multimedia applications are sensitive to delay. The virtual bus architecture is a hierarchical access network structure that has been proposed to simplify network signaling. The network employs an interconnection of hierarchical database to support advanced routing of the signaling and traffic load. Therefore, the requirements and management of quality of service is important in the virtual bus network particularly to support multimedia applications. QoS and traffic parameters are specified for each class type and the OMNeT model has been described

Full duplex switched ethernet for next generation "1553B" -based applications

Over the last thirty years, the MIL-STD 1553B data bus has been used in many embedded systems, like aircrafts, ships, missiles and satellites. However, the increasing number and complexity of interconnected subsystems lead to emerging needs for more communication bandwidth. Therefore, a new interconnection system is needed to overcome the limitations of the MIL-STD 1553B data bus. Among several high speed networks, Full Duplex Switched Ethernet is put forward here as an attractive candidate to replace the MIL-STD 1553B data bus. However, the key argument against Switched Ethernet lies in its non-deterministic behavior that makes it inadequate to deliver hard timeconstrained communications. Hence, our primary objective in this paper is to achieve an accepted QoS level offered by Switched Ethernet, to support diverse "1553B"-based applications requirements. We evaluate the performance of traffic shaping techniques on Full Duplex Switched Ethernet with an adequate choice of service strategy in the switch, to guarantee the real-time constraints required by these specific 1553B-based applications. An analytic study is conducted, using the Network Calculus formalism, to evaluate the deterministic guarantees offered by our approach. Theoretical analysis are then investigated in the case of a realistic "1553B"-based application extracted from a real military aircraft network. The results herein show the ability of profiled Full Duplex Switched Ethernet to satisfy 1553B-like real-time constraints