A verification technique for multiple soft fault diagnosis of linear analog circuits

The paper deals with multiple soft fault diagnosis of linear analog circuits. A fault verification method is developed that allows estimating the values of a set of the parameters considered as potentially faulty. The method exploits the transmittance of the circuit and is based on a diagnostic test leading to output signal in discrete form. Applying Z-transform a diagnostic equation is written which is next reproduced. The obtained system of equations consisting of larger number of equations than the number of the parameters is solved using appropriate numerical approach. The method is adapted to real circumstances taking into account scattering of the fault–free parameters within their tolerance ranges and some errors produced by the method. In consequence, the results provided by the method have the form of ranges including the values of the tested parameters. To illustrate the method two examples of real electronic circuits are given

New Aspects of Fault Diagnosis of Nonlinear Analog Circuits

The paper is focused on nonlinear analog circuits, with the special attention paid to circuits comprising bipolar and MOS transistors manufactured in micrometer and submicrometer technology. The problem of fault diagnosis of this class of circuits is discussed, including locating faulty elements and evaluating their parameters. The paper deals with multiple parametric fault diagnosis using the simulation after test approach as well as detection and location of single catastrophic faults, using the simulation before test approach. The discussed methods are based on diagnostic test, leading to a system of nonlinear algebraic type equations, which are not given in explicit analytical form. An important and new aspect of the fault diagnosis is finding multiple solutions of the test equation, i.e. several sets of the parameters values that meet the test. Another new problems in this area are global fault diagnosis of technological parameters in CMOS circuits fabricated in submicrometer technology and testing the circuits  having multiple DC operating points. To solve these problems several methods have been recently developed, which employ  different concepts and mathematical tools of nonlinear analysis. In this paper they are sketched and illustrated.  All the discussed methods are based on the homotopy (continuation) idea. It is shown that various versions of homotopy and combinations  of the homotopy with some other mathematical algorithms lead to very powerful tools for fault diagnosis of nonlinear analog circuits.  To trace the homotopy path which allows finding multiple solutions, the simplicial method, the restart method, the theory of linear complementarity problem and Lemke's algorithm are employed. For illustration four numerical examples are given