A Novel Approach to Multiagent based Scheduling for Multicore Architecture

In a Multicore architecture, eachpackage consists of large number of processors. Thisincrease in processor core brings new evolution inparallel computing. Besides enormous performanceenhancement, this multicore package injects lot ofchallenges and opportunities on the operating systemscheduling point of view. We know that multiagentsystem is concerned with the development andanalysis of optimization problems. The main objectiveof multiagent system is to invent some methodologiesthat make the developer to build complex systems thatcan be used to solve sophisticated problems. This isdifficult for an individual agent to solve. In this paperwe combine the AMAS theory of multiagent systemwith the scheduler of operating system to develop anew process scheduling algorithm for multicorearchitecture. This multiagent based schedulingalgorithm promises in minimizing the average waitingtime of the processes in the centralized queue and alsoreduces the task of the scheduler. We actuallymodified and simulated the linux 2.6.11 kernel processscheduler to incorporate the multiagent systemconcept. The comparison is made for different numberof cores with multiple combinations of process and theresults are shown for average waiting time Vs numberof cores in the centralized queue

AMC: Advanced Multi-accelerator Controller

The rapid advancement, use of diverse architectural features and introduction of High Level Synthesis (HLS) tools in FPGA technology have enhanced the capacity of data-level parallelism on a chip. A generic FPGA based HLS multi-accelerator system requires a microprocessor (master core) that manages memory and schedules accelerators. In a real environment, such HLS multi-accelerator systems do not give a perfect performance due to memory bandwidth issues. Thus, a system demands a memory manager and a scheduler that improves performance by managing and scheduling the multi-accelerator’s memory access patterns efficiently. In this article, we propose the integration of an intelligent memory system and efficient scheduler in the HLS-based multi-accelerator environment called Advanced Multi-accelerator Controller (AMC). The AMC system is evaluated with memory intensive accelerators, High Performance Computing (HPC) applications and implemented and tested on a Xilinx Virtex-5 ML505 evaluation FPGA board. The performance of the system is compared against the microprocessor-based systems that have been integrated with the operating system. Results show that the AMC based HLS multi-accelerator system achieves 10.4x and 7x of speedup compared to the MicroBlaze and Intel Core based HLS multi-accelerator systems.Peer ReviewedPostprint (author’s final draft