74 research outputs found
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Parallel computing in information retrieval - An updated review
The progress of parallel computing in Information Retrieval (IR) is reviewed. In particular we stress the importance of the motivation in using parallel computing for Text Retrieval. We analyse parallel IR systems using a classification due to Rasmussen [1] and describe some parallel IR systems. We give a description of the retrieval models used in parallel Information Processing.. We describe areas of research which we believe are needed
Efficient Mapping of Neural Network Models on a Class of Parallel Architectures.
This dissertation develops a formal and systematic methodology for efficient mapping of several contemporary artificial neural network (ANN) models on k-ary n-cube parallel architectures (KNC\u27s). We apply the general mapping to several important ANN models including feedforward ANN\u27s trained with backpropagation algorithm, radial basis function networks, cascade correlation learning, and adaptive resonance theory networks. Our approach utilizes a parallel task graph representing concurrent operations of the ANN model during training. The mapping of the ANN is performed in two steps. First, the parallel task graph of the ANN is mapped to a virtual KNC of compatible dimensionality. This involves decomposing each operation into its atomic tasks. Second, the dimensionality of the virtual KNC architecture is recursively reduced through a sequence of transformations until a desired metric is optimized. We refer to this process as folding the virtual architecture. The optimization criteria we consider in this dissertation are defined in terms of the iteration time of the algorithm on the folded architecture. If necessary, the mapping scheme may utilize a subset of the processors of a given KNC architecture if it results in the most efficient simulation. A unique feature of our mapping is that it systematically selects an appropriate degree of parallelism leading to a highly efficient realization of the ANN model on KNC architectures. A novel feature of our work is its ability to efficiently map unit-allocating ANN\u27s. These networks possess a dynamic structure which grows during training. We present a highly efficient scheme for simulating such networks on existing KNC parallel architectures. We assume an upper bound on size of the neural network We perform the folding such that the iteration time of the largest network is minimized. We show that our mapping leads to near-optimal simulation of smaller instances of the neural network. In addition, based on our mapping no data migration or task rescheduling is needed as the size of network grows
Proceedings. 25. Workshop Computational Intelligence, Dortmund, 26. - 27. November 2015
Dieser Tagungsband enthält die Beiträge des 25. Workshops „Computational Intelligence“ des Fachausschusses 5.14 der VDI/VDE-Gesellschaft für Mess- und Automatisierungstechnik (GMA) , der vom 26. – 27. November 2015 in Dortmund stattfindet
Scalable Parallel Computers for Real-Time Signal Processing
We assess the state-of-the-art technology in massively parallel processors (MPPs) and their variations in different architectural platforms. Architectural and programming issues are identified in using MPPs for time-critical applications such as adaptive radar signal processing. We review the enabling technologies. These include high-performance CPU chips and system interconnects, distributed memory architectures, and various latency hiding mechanisms. We characterize the concept of scalability in three areas: resources, applications, and technology. Scalable performance attributes are analytically defined. Then we compare MPPs with symmetric multiprocessors (SMPs) and clusters of workstations (COWs). The purpose is to reveal their capabilities, limits, and effectiveness in signal processing. We evaluate the IBM SP2 at MHPCC, the Intel Paragon at SDSC, the Gray T3D at Gray Eagan Center, and the Gray T3E and ASCI TeraFLOP system proposed by Intel. On the software and programming side, we evaluate existing parallel programming environments, including the models, languages, compilers, software tools, and operating systems. Some guidelines for program parallelization are provided. We examine data-parallel, shared-variable, message-passing, and implicit programming models. Communication functions and their performance overhead are discussed. Available software tools and communication libraries are also introducedpublished_or_final_versio
Fault tolerance issues in nanoelectronics
The astonishing success story of microelectronics cannot go on indefinitely. In fact, once
devices reach the few-atom scale (nanoelectronics), transient quantum effects are expected
to impair their behaviour. Fault tolerant techniques will then be required. The aim of this
thesis is to investigate the problem of transient errors in nanoelectronic devices. Transient
error rates for a selection of nanoelectronic gates, based upon quantum cellular automata
and single electron devices, in which the electrostatic interaction between electrons is used
to create Boolean circuits, are estimated. On the bases of such results, various fault tolerant
solutions are proposed, for both logic and memory nanochips. As for logic chips, traditional
techniques are found to be unsuitable. A new technique, in which the voting approach of
triple modular redundancy (TMR) is extended by cascading TMR units composed of
nanogate clusters, is proposed and generalised to other voting approaches. For memory
chips, an error correcting code approach is found to be suitable. Various codes are
considered and a lookup table approach is proposed for encoding and decoding. We are
then able to give estimations for the redundancy level to be provided on nanochips, so as to
make their mean time between failures acceptable. It is found that, for logic chips, space
redundancies up to a few tens are required, if mean times between failures have to be of the
order of a few years. Space redundancy can also be traded for time redundancy. As for
memory chips, mean times between failures of the order of a few years are found to imply
both space and time redundancies of the order of ten
Optical Character Recognition Using Morphological Attributes.
This dissertation addresses a fundamental computational strategy in image processing hand written English characters using traditional parallel computers. Image acquisition and processing is becoming a thriving industry because of the frequent availability of fax machines, video digitizers, flat-bed scanners, hand scanners, color scanners, and other image input devices that are now accessible to everyone. Optical Character Recognition (OCR) research increased as the technology for a robust OCR system became realistic. There is no commercial effective recognition system that is able to translate raw digital images of hand written text into pure ASCII. The reason is that a digital image comprises of a vast number of pixels. The traditional approach of processing the huge collection of pixel information is quite slow and cumbersome. In this dissertation we developed an approach and theory for a fast robust OCR system for images of hand written characters using morphological attribute features that are expected by the alphabet character set. By extracting specific morphological attributes from the scanned image, the dynamic OCR system is able to generalize and approximate similar images. This generalization is achieved with the usage of fuzzy logic and neural network. Since the main requirement for a commercially effective OCR is a fast and a high recognition rate system, the approach taken in this research is to shift the recognition computation into the system\u27s architecture and its learning phase. The recognition process constituted mainly simple integer computation, a preferred computation on digital computers. In essence, the system maintains the attribute envelope boundary upon which each English character could fall under. This boundary is based on extreme attributes extracted from images introduced to the system beforehand. The theory was implemented both on a SIMD-MC\sp2 and a SISD machine. The resultant system proved to be a fast robust dynamic system, given that a suitable learning had taken place. The principle contributions of this dissertation are: (1) Improving existing thinning algorithms for image preprocessing. (2) Development of an on-line cluster partitioning procedure for region oriented segmentation. (3) Expansion of a fuzzy knowledge base theory to maintain morphological attributes on digital computers. (4) Dynamic Fuzzy learning/recognition technique
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Computing resources sensitive parallelization of neural neworks for large scale diabetes data modelling, diagnosis and prediction
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.Diabetes has become one of the most severe deceases due to an increasing number of diabetes patients globally. A large amount of digital data on diabetes has been collected through various channels. How to utilize these data sets to help doctors to make a decision on diagnosis, treatment and prediction of diabetic patients poses many challenges to the research community. The thesis investigates mathematical models with a focus on neural networks for large scale diabetes data modelling and analysis by utilizing modern computing technologies such as grid computing and cloud computing. These computing technologies provide users with an inexpensive way to have access to extensive computing resources over the Internet for solving data and computationally intensive problems. This thesis evaluates the performance of seven representative machine learning techniques in classification of diabetes data and the results show that neural network produces the best accuracy in classification but incurs high overhead in data training. As a result, the thesis develops MRNN, a parallel neural network model based on the MapReduce programming model which has become an enabling technology in support of data intensive applications in the clouds.
By partitioning the diabetic data set into a number of equally sized data blocks, the workload in training is distributed among a number of computing nodes for speedup in data training. MRNN is first evaluated in small scale experimental environments using 12 mappers and subsequently is evaluated in large scale simulated environments using up to 1000 mappers. Both the experimental and simulations results have shown the effectiveness of MRNN in classification, and its high scalability in data training.
MapReduce does not have a sophisticated job scheduling scheme for heterogonous computing environments in which the computing nodes may have varied computing capabilities. For this purpose, this thesis develops a load balancing scheme based on genetic algorithms with an aim to balance the training workload among heterogeneous computing nodes. The nodes with more computing capacities will receive more MapReduce jobs for execution. Divisible load theory is employed to guide the evolutionary process of the genetic algorithm with an aim to achieve fast convergence. The proposed load balancing scheme is evaluated in large scale simulated MapReduce environments with varied levels of heterogeneity using different sizes of data sets. All the results show that the genetic algorithm based load balancing scheme significantly reduce the makespan in job execution in comparison with the time consumed without load balancing.This work is funded by the EPSRC and China Market Association
Parallel hierarchical radiosity rendering
The radiosity equation is examined, and is found to contain a previously unexploited symmetry. This symmetry is formalized, and a solution method previously unusable in the field of computer graphics (conjugate gradients) is shown to be superior to all methods currently in use. A detailed analysis of all solution techniques previously applied to the radiosity problem is conducted, and results presented;So-called hierarchical methods have reduced the operational complexity of the N-body problem from O(N[superscript]2) to O(N log N) assuming a pre-set error tolerance. An algorithm following the same basic tenets has been applied to radiosity rendering by other researchers, and has reduced the operational complexity from O(N[superscript]2) to (arguably) O(N);Shortcomings in the state-of-the-art hierarchical radiosity method are pointed out, and enhancements are offered. A consistent treatment of various types of error is found to be absent from present methods. Catastrophic error is possible in the visibility assessment between two polygons. A self-consistency check is possible during the solution process, but never exploited;Until now, supercomputer-class computers have not been used to solve radiosity problems at a production-quality level even though realistic image synthesis has always been a prodigious consumer of computer time. A state-of-the-art hierarchical radiosity code is implemented on an nCUBE-2 parallel computer, and discussed in detail. The algorithm is found to have ample sources of parallelism, in both data- and operational modes. Its performance is analyzed in detail;The hierarchical method has only been applied to realistic image synthesis since 1991. Not surprisingly, many avenues of further research are open. Some are pointed out, and include: analytic determination of coupling factors, quantifying discretization error, incorporating specular light reflection modes into the hierarchical treatment, and exploring what other important physical problems might benefit from the hierarchical approach
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