Low-High-Power Consumption Architectures for Deep-Learning Models Applied to Hyperspectral Image Classification

Convolutional neural networks have emerged as an excellent tool for remotely sensed hyperspectral image (HSI) classification. Nonetheless, the high computational complexity and energy requirements of these models typically limit their application in on-board remote sensing scenarios. In this context, low-power consumption architectures are promising platforms that may provide acceptable on-board computing capabilities to achieve satisfactory classification results with reduced energy demand. For instance, the new NVIDIA Jetson Tegra TX2 device is an efficient solution for on-board processing applications using deep-learning (DL) approaches. So far, very few efforts have been devoted to exploiting this or other similar computing platforms in on-board remote sensing procedures. This letter explores the use of low-power consumption architectures and DL algorithms for HSI classification. The conducted experimental study reveals that the NVIDIA Jetson Tegra TX2 device offers a good choice in terms of performance, cost, and energy consumption for on-board HSI classification tasks

Optimization of selected remote sensing algorithms for many-core architectures

This paper evaluates the potential of embedded graphic processing units (GPU) in the Nvidia's Tegra K1 for onboard processing. The performance is compared to a general purpose multicore central processing unit (CPU), a full-fledge GPU accelerator, and an Intel Xeon Phi coprocessor, for two representative potential applications, wavelet spectral dimension reduction of hyperspectral imagery and automated cloud-cover assessment (ACCA). For these applications, Tegra K1 achieved 51% performance for the ACCA algorithm and 20% performance for the dimension reduction algorithm, as compared to the performance of the high-end eight-core server Intel Xeon CPU which has a 13.5 times higher power consumption. This paper also shows the potential of modern high-performance computing accelerators for algorithms such as the ones for which the paper presents an optimized parallel implementation. The two algorithms that were tested mostly contain spatially localized computations, and one can assume that all image processing algorithms containing localized computations would exhibit similar speed-ups when implemented on these parallel architectures.Web of Science9125587557