A 30 Gbps Low-Complexity and Real-Time Digital Modem for Wireless Communications at 0.325 THz

© 2019 IEEE. A high-speed wideband terahertz (THz) communication system with low-complexity and real-time digital signal processing (DSP) is presented in this paper. The architectures of baseband platform, intermediate frequency (IF) module and radio frequency (RF) frontend are described. For real-time DSP implementation with affordable field programmable gate array (FPGA) device, some effective strategies are discussed to reduce resource usage and ensure that the clock constraints are met. Adopting these strategies, all physical layer DSP modules are implemented in two FPGAs with more than 300 MHz system clock. The experimental test results using the developed real-time digital modem prototype demonstrate the superb performance for THz wireless communications

A High-speed Reconfigurable Free Space Optical Communication System Utilizing Software Defined Radio Environment

Free space optical (FSO) communication allows for high-speed data transmissions while also being extremely cost-effective by using visible or infrared wavelengths to transmit and receive data wirelessly through the free space channel. However, FSO links are highly susceptible to the effects of the atmosphere, particularly turbulence, smoke, and fog. On the other hand, FSO itself does not provide enough flexibility to address the issue of such blockage and obstruction caused by objects and atmospheric conditions. This research investigates, proposes, and evaluates a software defined multiple input multiple output (MIMO) FSO system to ensure link availability and reliability under weather conditions as part of the last mile access in the 5th generation, 6th generation, and beyond. Software defined radio (SDR) technology is adopted in order to provide a certain degree of flexibility to the optical wireless communications system. The scope of this research focuses on the design, validation, implementation, and evaluation of a novel adaptive switching algorithm i.e., activating additional transmitters of a MIMO FSO system using a software defined ecosystem. The main issues are the compactness of the experimental design; the limitation of software-oriented signal generation; robustness; reliability; and the quality of service. As part of the system design, the thresholding method, a decision-making process via the feedback link, and a spatial diversity technique is adopted to carry out the adaptive switching. The adaptive switching is performed via a feedback link in which the atmospheric loss and scintillation index are calculated for fog and turbulence respectively. The initial design is implemented in SDR/ GNURadio for a real-time emulation of the proposed system to enhance the system flexibility of a traditional MIMO FSO system. A bit-by-bit comparison is performed with the GNURadio signal processing block and BERT for a real-time BER estimation. However, based on the initial results, the switching mechanism can only overcome the effect of turbulence at a certain level. A new design to mainly mitigate the varying fog conditions is proposed based on the SDR-based adaptive switching for a gigabit ethernet (GbE) MIMO FSO system and tested in a 5 m dedicated atmospheric chamber. The proposed system is implemented using off-the-shelf components such as a media converter, small form pluggable transceivers, optical switch, and power meter to estimate the channel state information. A new Schmitt trigger-based thresholding method is also introduced. The proposed software defined GbE MIMO FSO with an adaptive switching algorithm is fabricated, implemented, and investigated. The results are also compared with the real-time simulated data. Since the purpose of this Ph.D. is to explain and demonstrate the proof of concept for the proposed SDR-MIMO FSO system, the emphasis has been on the design, evaluation, and minimal performance requirements rather than maximizing the data rate. The outcome of the thesis will be a huge degree of flexibility and mitigation property MIMO FSO can offer with the help of SDR. It will be shown that the designed system has the capability to provide data transmission with 99.999% availability with a packet error rate and data rate of 7.2 ×10−2 and ~120 Mbps respectively, under extremely harsh fog conditions with visibility V of < 11 m

Modulation, Coding, and Receiver Design for Gigabit mmWave Communication

While wireless communication has become an ubiquitous part of our daily life and the world around us, it has not been able yet to deliver the multi-gigabit throughput required for applications like high-definition video transmission or cellular backhaul communication. The throughput limitation of current wireless systems is mainly the result of a shortage of spectrum and the problem of congestion. Recent advancements in circuit design allow the realization of analog frontends for mmWave frequencies between 30GHz and 300GHz, making abundant unused spectrum accessible. However, the transition to mmWave carrier frequencies and GHz bandwidths comes with new challenges for wireless receiver design. Large variations of the channel conditions and high symbol rates require flexible but power-efficient receiver designs. This thesis investigates receiver algorithms and architectures that enable multi-gigabit mmWave communication. Using a system-level approach, the design options between low-power time-domain and power-hungry frequency-domain signal processing are explored. The system discussion is started with an analysis of the problem of parameter synchronization in mmWave systems and its impact on system design. The proposed synchronization architecture extends known synchronization techniques to provide greater flexibility regarding the operating environments and for system efficiency optimization. For frequency-selective environments, versatile single-carrier frequency domain equalization (SC-FDE) offers not only excellent channel equalization, but also the possibility to integrate additional baseband tasks without overhead. Hence, the high initial complexity of SC-FDE needs to be put in perspective to the complexity savings in the other parts of the baseband. Furthermore, an extension to the SC-FDE architecture is proposed that allows an adaptation of the equalization complexity by switching between a cyclic-prefix mode and a reduced block length overlap-save mode based on the delay spread. Approaching the problem of complexity adaptation from time-domain, a high-speed hardware architecture for the delayed decision feedback sequence estimation (DDFSE) algorithm is presented. DDFSE uses decision feedback to reduce the complexity of the sequence estimation and allows to set the system performance between the performance of full maximum-likelihood detection and pure decision feedback equalization. An implementation of the DDFSE architecture is demonstrated as part of an all-digital IEEE802.11ad baseband ASIC manufactured in 40nm CMOS. A flexible architecture for wideband mmWave receivers based on complex sub-sampling is presented. Complex sub-sampling combines the design advantages of sub-sampling receivers with the flexibility of direct-conversion receivers using a single passive component and a digital compensation scheme. Feasibility of the architecture is proven with a 16Gb/s hardware demonstrator. The demonstrator is used to explore the potential gain of non-equidistant constellations for high-throughput mmWave links. Specifically crafted amplitude phase-shift keying (APSK) modulation achieve 1dB average mutual information (AMI) advantage over quadrature amplitude modulation (QAM) in simulation and on the testbed hardware. The AMI advantage of APSK can be leveraged for a practical transmission using Polar codes which are trained specifically for the constellation

Hardware-Conscious Wireless Communication System Design

The work at hand is a selection of topics in efficient wireless communication system design, with topics logically divided into two groups.One group can be described as hardware designs conscious of their possibilities and limitations. In other words, it is about hardware that chooses its configuration and properties depending on the performance that needs to be delivered and the influence of external factors, with the goal of keeping the energy consumption as low as possible. Design parameters that trade off power with complexity are identified for analog, mixed signal and digital circuits, and implications of these tradeoffs are analyzed in detail. An analog front end and an LDPC channel decoder that adapt their parameters to the environment (e.g. fluctuating power level due to fading) are proposed, and it is analyzed how much power/energy these environment-adaptive structures save compared to non-adaptive designs made for the worst-case scenario. Additionally, the impact of ADC bit resolution on the energy efficiency of a massive MIMO system is examined in detail, with the goal of finding bit resolutions that maximize the energy efficiency under various system setups.In another group of themes, one can recognize systems where the system architect was conscious of fundamental limitations stemming from hardware.Put in another way, in these designs there is no attempt of tweaking or tuning the hardware. On the contrary, system design is performed so as to work around an existing and unchangeable hardware limitation. As a workaround for the problematic centralized topology, a massive MIMO base station based on the daisy chain topology is proposed and a method for signal processing tailored to the daisy chain setup is designed. In another example, a large group of cooperating relays is split into several smaller groups, each cooperatively performing relaying independently of the others. As cooperation consumes resources (such as bandwidth), splitting the system into smaller, independent cooperative parts helps save resources and is again an example of a workaround for an inherent limitation.From the analyses performed in this thesis, promising observations about hardware consciousness can be made. Adapting the structure of a hardware block to the environment can bring massive savings in energy, and simple workarounds prove to perform almost as good as the inherently limited designs, but with the limitation being successfully bypassed. As a general observation, it can be concluded that hardware consciousness pays off

Sparse graph-based coding schemes for continuous phase modulations

The use of the continuous phase modulation (CPM) is interesting when the channel represents a strong non-linearity and in the case of limited spectral support; particularly for the uplink, where the satellite holds an amplifier per carrier, and for downlinks where the terminal equipment works very close to the saturation region. Numerous studies have been conducted on this issue but the proposed solutions use iterative CPM demodulation/decoding concatenated with convolutional or block error correcting codes. The use of LDPC codes has not yet been introduced. Particularly, no works, to our knowledge, have been done on the optimization of sparse graph-based codes adapted for the context described here. In this study, we propose to perform the asymptotic analysis and the design of turbo-CPM systems based on the optimization of sparse graph-based codes. Moreover, an analysis on the corresponding receiver will be done

Cross-Layer design and analysis of cooperative wireless networks relying on efficient coding techniques

2011/2012This thesis work aims at analysing the performance of efficient cooperative techniques and of smart antenna aided solutions in the context of wireless networks. Particularly, original contributions include a performance analysis of distributed coding techniques for the physical layer of communication systems, the design of practical efficient coding schemes that approach the analytic limiting bound, the cross-layer design of cooperative medium access control systems that incorporate and benefit from advanced physical layer techniques, the study of the performance of such solutions under realistic network assumptions, and, finally the design of access protocols where nodes are equipped with smart antenna systems.XXV Ciclo198

Amélioration de la sécurité et de la fiabilité des systèmes de communication sans fil

Dans ce mémoire, de nouvelles approches ont été introduites pour concevoir les systèmes de communication fiables, Section 1, et sécurisées, Section 2, où les codes LDPC ont été choisis comme schéma de codage principal. Ce mémoire comprend deux sections : Section 1 : Les codes LDPC réguliers et irréguliers sont définis et différents décodeurs basés sur l’échange de message de décisions fermes et souples sont introduits. Par la suite, quelques définitions, comme le seuil des codes LDPC utilisant l’évolution de la densité de probabilité (ou la propagation de croyance), l’écart multiplicatif et les distributions de degrés de noeuds de parité et de noeuds de variable, sont énoncées. Par après, ces concepts préliminaires sont utilisés pour concevoir des ensembles de code LDPC irréguliers approchant la capacité du canal à l’aide de programmation linéaire et d’un algorithme génétique. Section 2 : Une méthode est introduite pour l’amélioration du secret dans ce genre de système. Cette méthode fonctionne sur la base de demande de retransmission de paquets d’information. Selon cette approche, lorsque le récepteur ne peut pas converger vers le bon message, une demande de retransmission est envoyée. Au lieu d’envoyer le paquet entier dans le cas d’une défaillance à la sortie du décodeur du destinataire, la retransmission des sous-paquets est explorée. Le système proposé dans cette phase est appelé protocole HARQ-Granulaire Adaptatif (AG-HARQ). Il essaie de réduire au minimum le taux requis pour un décodage réussi par les parties légitimes tout en augmentant la sécurité en minimisant les fuites d’information vers un espion éventuel. En outre, pour améliorer encore le niveau de sécurité dans la méthode AG-HARQ proposée, le schéma de contamination d’erreur intra-trame (IntraEC) et le schéma de contamination d’erreur inter-trame (InterEC) sont utilisés en conjonction avec cette méthode. Cette combinaison permet un haut niveau de sécurité dans le système de communication sans fil.In this memoir, new approaches have been introduced for designing reliable, Section 1, and secure, Section 2, communication systems where the LDPC codes have been chosen as the principal coding scheme. This memoir comprises two sections: Section 1: Regular and irregular LDPC codes are defined and different message passing decoders based on hard and soft decisions are introduced. Afterward, some definitions like the threshold of LDPC codes using Density Evolution (or Belief Propagation), the Multiplicative Gap, and the check node and variable node degree distributions are explained in detail. Later, these preliminary concepts are used to design the channel capacity approaching Irregular LDPC codes combining Genetic Algorithm and Linear Programming. Section 2: A new scheme is introduced for secrecy enhancement for these systems. This method is based on feedback retransmission requests. With this approach, when the intended recipient cannot converge to the right message, a retransmission request is sent back to the transmitter. The retransmission of the sub-packets, instead of sending the whole packet in the case of failure at the intended recipient’s decoder output, is explored in detail. Our proposed scheme is called Adaptive Granular Hybrid Automatic Repeat reQuest (AG-HARQ) protocol, which tries to minimize the required rate for successful decoding of the legitimate parties while amplifying the privacy by minimizing the information leakage to a wiretapper. In addition, to further improve the security level of the proposed AG-HARQ method, Intra-frame error contamination (IntraEC) and Inter-frame error contamination (InterEC) schemes are used in conjunction with this method. This combination can provide a high level of security in wireless communication systems