5 research outputs found

    Testing of Analog and RF Circuits using Embedded Sensors

    Get PDF
    Testing of on - chip RF and microwave circuits has always been a challenge to the test engineers. Since the emergence of System - on - a - Chip (SoC), characterization and test de vel op ment is time - consuming, they contribute to a significant part of the manufacturing cost. Moreover, test development of RF and microwave circuits requires years of experience and expertise. In this paper, we propose to use built - in - test in the form of specific sensors. Instead of testing the devices specifically for certain performance metrics, the output values of the sensors, which are usually DC or a very low frequency signal, can b e used to get a quick and accurate estimate of the behavior of the devic e under test (DUT). For a relatively low - yielding process, which is usually the case for RF and microwave circuits, significant number of faulty devices can be identified without even performing the standard manufacturing test on the devices. Moreover, the se sensors can also be used for on - line test. In this paper, we also propose an algorithm to optimally place the sensors at the output of a system - under - test and use the sensor output to get an estimate of the specifications of the system - under - test. Using this method, specifications can be estimated within an accuracy of ± 3% of its actual value

    Design of a Window Comparator with Adaptive Error Threshold for Online Testing Applications

    Get PDF
    This paper presents a novel window comparator circuit whose error threshold can be adaptively adjusted according to its input signal levels. It is ideal for analog online testing applications. Advantages of adaptive comparator error thresholds over constant or relative error thresholds in analog testing applications are discussed. Analytical equations for guiding the design of proposed comparator circuitry are derived. The proposed comparator circuit has been designed and fabricated using a CMOS 0.18mu technology. Measurement results of the fabricated chip are presented

    A Programmable Window Comparator for Analog Online Testing

    Get PDF
    This paper discusses the challenge of designing window comparators for analog online testing applications. A programmable window comparator with adaptive error threshold is presented. Experimental results demonstrate that improved fault detection capability is achieved by using the proposed design. Measurement results of the fabricated comparator circuit are also presented

    On-line Testing Field Programmable Analog Array Circuits

    Get PDF
    This work presents an efficient methodology to on-line test field programmable analog array (FPAA) circuits. It proposes to partition the FPAA circuit under test into sub circuits. Each sub circuit is tested by replicating the sub circuit with programmable resources on FPAAs, and comparing the outputs of the original partitioned sub circuit and its replication. The advantages of this approach includes: low implementation cost, enhanced testability, and flexible testing schedules. This work also presents circuit techniques to address stability problems which are often encountered in the proposed on-line testing approach. In addition, the impact of performing circuit partition on testability is investigated in this work. It shows that testability is generally improved in partitioned circuits. Finally, experimental results are presented to demonstrate the feasibility and effectiveness of the proposed techniques

    On-line BIST for testing analog circuits

    No full text
    In this paper, we present a new online built-in self-test (BIST) approach for testing analog circuits. It uses a current window comparator and current-based checker circuits for processing the test response of the analog parts in mixed-signal integrated circuits. Online analog BIST capability is achieved by using high-speed current-mode circuits. A leapfrog filter has been considered as a test vehicle, and simulation results show the feasibility and effectiveness of the proposed BIST approach
    corecore