Precision packet-based frequency transfer based on oversampling

Frequency synchronization of a distributed measurement system requires the transfer of an accurate frequency reference to all nodes. The use of a general-purpose packet-based network for this aim is analyzed in this paper, where oversampling is considered as a means to counter the effects of packet delay variation on time accuracy. A comprehensive analysis that includes the stability of the local clock is presented and shows that frequency transfer through a packet network of this kind is feasible, with an accuracy level that can be of interest to a number of distributed measurement applications

FPGA-Based Testbed for Synchronization on Ethernet Fronthaul with Phase Noise Measurements

Cloud radio access network (C-RAN) is a recent trend of RAN architecture positioned to help the operators to address challenges of new wireless services, such as emerging 4G and 5G mobile networks. C-RAN uses baseband processing units in a central server which connects to the radio front-ends at cell sites via the so-called fronthaul network. The fronthaul infrastructure is currently provided by CPRI (Common Public Radio Interface) and OBSAI (Open Basestation Architecture Initiative) industry standards which use dedicated optical links with high deployment costs. An alternative is to use Ethernet technology aiming to reuse of network infrastructure available in many commercial buildings. However, in contrast to the traditional synchronous fronthaul, Ethernet suffers with packet delay variation (PDV) and challenging synchronization recovery. This work presents a complete and flexible testbed to evaluate Ethernet-based fronthaul. The system is validated via extensive measurements that show the effects of synchronization procedures and network impairments on regenerated clock phase noise

Tarkan ja luotettavan ajan siirto kantaverkossa

This master’s thesis is about time distribution that supports substation applications needed for power transmission. The work was done for the Telecommunication department of Finland’s power transmission system operator Fingrid Oyj. This thesis answers to the following question: What is the need for accurate and synchronized time in power substations and how it will be delivered? Fingrid’s telecommunication network supports the power transmission grid and its operation. Telecommunication network can distribute time to power substations for the applications that need synchronized and accurate time. Current telecommunication equipment used in Fingrid is getting old and new techniques are planned to be implemented. When Fingrid is acquiring new communication equipment, they need to set requirements on the capability to distribute time. This thesis is an initial effort to investigate time distribution requirements for Fingrid’s needs. This thesis aids Fingrid Telecommunication department to define requirements for time distribution. For this thesis, I met with multiple Fingrid professionals, telecommunication device suppliers and time distribution researchers. This thesis answers to its research questions by means of a literature review and interviews.Tämä diplomityö käsittelee ajansiirron vaikutusta sähköasemasovellusten toimintaan. Työ tehtiin Suomen kantaverkkoyhtiö Fingrid Oyj:n tietoliikenneyksikölle. Fingridin tietoliikenneverkko on osa kantaverkkoa ja mahdollistaa sähköjärjestelmän toiminteita. Tietoliikenneverkon yksi palvelu on synkronoidun ajan siirtäminen sähköasemille. Nykyinen tietoliikennetekniikka on vanhenemassa ja uutta laitteistoa suunnitellaan hankittavaksi ja testattavaksi. Tämän diplomityön tarkoitus on selvittää mikä on järkevä tapa toteuttaa ajan siirto ja kuinka tarkkaa sen pitää olla. Työ auttaa tietoliikenneyksikköä hankinnan vaatimusmäärittelyssä ajansiirron osalta. Työtä varten on tavattu monia Fingridin asiantuntijoita, tietoliikennelaitetoimittajia sekä ajansiirron asiantuntijoita. Työ vastaa tutkimuskysymykseen kirjallisuuskatsauksen ja haastattelujen perusteella

A Survey of Clock Synchronization Over Packet-Switched Networks

Clock synchronization is a prerequisite for the realization of emerging applications in various domains such as industrial automation and the intelligent power grid. This paper surveys the standardized protocols and technologies for providing synchronization of devices connected by packet-switched networks. A review of synchronization impairments and the state-of-the-art mechanisms to improve the synchronization accuracy is then presented. Providing microsecond to sub-microsecond synchronization accuracy under the presence of asymmetric delays in a cost-effective manner is a challenging problem, and still an open issue in many application scenarios. Further, security is of significant importance for systems where timing is critical. The security threats and solutions to protect exchanged synchronization messages are also discussed

Clock synchronisation for UWB and DECT communication networks

Synchronisation deals with the distribution of time and/or frequency across a network of nodes dispersed in an area, in order to align their clocks with respect to time and/or frequency. It remains an important requirement in telecommunication networks, especially in Time Division Duplexing (TDD) systems such as Ultra Wideband (UWB) and Digital Enhanced Cordless Telecommunications (DECT) systems. This thesis explores three di erent research areas related to clock synchronisation in communication networks; namely algorithm development and implementation, managing Packet Delay Variation (PDV), and coping with the failure of a master node. The first area proposes a higher-layer synchronisation algorithm in order to meet the specific requirements of a UWB network that is based on the European Computer Manufacturers Association (ECMA) standard. At up to 480 Mbps data rate, UWB is an attractive technology for multimedia streaming. Higher-layer synchronisation is needed in order to facilitate synchronised playback at the receivers and prevent distortion, but no algorithm is de ned in the ECMA-368 standard. In this research area, a higher-layer synchronisation algorithm is developed for an ECMA-368 UWB network. Network simulations and FPGA implementation are used to show that the new algorithm satis es the requirements of the network. The next research area looks at how PDV can be managed when Precision Time Protocol (PTP) is implemented in an existing Ethernet network. Existing literature indicates that the performance of a PDV ltering algorithm usually depends on the delay pro le of the network in which it is applied. In this research area, a new sample-mode PDV filter is proposed which is independent of the shape of the delay profile. Numerical simulations show that the sample-mode filtering algorithm is able to match or out-perform the existing sample minimum, mean, and maximum filters, at differentlevels of network load. Finally, the thesis considers the problem of dealing with master failures in a PTP network for a DECT audio application. It describes the existing master redundancy techniques and shows why they are unsuitable for the specific application. Then a new alternate master cluster technique is proposed along with an alternative BMCA to suit the application under consideration. Network simulations are used to show how this technique leads to a reduction in the total time to recover from a master failure

Precise Network Time Monitoring: Picosecond-level packet timestamping for Fintech networks

Network visibility and monitoring are critical in modern networks due to the increased density, additional complexity, higher bandwidth, and lower latency requirements. Precise packet timestamping and synchronization are essential to temporally correlate captured information in different datacenter locations. This is key for visibility, event ordering and latency measurements in segments as telecom, power grids and electronic trading in finance, where order execution and reduced latency are critical for successful business outcomes. This contribution presents Precise Network Time Monitoring (PNTM), a novel mechanism for asynchronous Ethernet packet timestamping which adapts a Digital Dual Mixer Time Difference (DDMTD) implemented in an FPGA. Picosecond-precision packet timestamping is outlined for 1 Gigabit Ethernet. Furthermore, this approach is combined with the White Rabbit (WR) synchronization protocol, used as reference for the IEEE 1588-2019 High Accuracy Profile to provide unprecedented packet capturing correlation accuracy in distributed network scenarios thanks to its sub-nanosecond time transfer. The paper presents different application examples, describes the method of implementation, integration of WR with PNTM and subsequently describes experiments to demonstrate that PNTM is a suitable picosecond-level distributed packet timestamping solutionNational project AMIGA7 RTI2018-096228-B-C32Andalusian project SINPA B-TIC-445-UGR1

IMPLEMENTING PROPOSED IEEE 1588 INTEGRATED SECURITY MECHANISM

The IEEE 1588 Precision Time Protocol is the industry standard for precise time synchronization, used in applications such as the power grid, telecommunications, and audio-video bridging, among many others. However, the standard\u27s recommendations on how to secure the protocol are lacking, and thus have not been widely adopted. A new revision of IEEE 1588 is currently being developed, which will include revised specifications regarding security. The aim of this thesis is to explore the feasibility of the proposed security mechanism, specifically as it would apply to use in the power grid, through implementation and evaluation. The security mechanism consists of two verification approaches, immediate and delayed; we implemented both approaches on top of PTPd, an existing open source implementation of PTP. We support the immediate verification security approach using manual key management at startup, and we support the delayed verification security approach emulating automated key management for a set of security parameters corresponding to one manually configured time period. In our experiments, we found that added performance cost for both verification approaches was within 30 μs, and PTP synchronization quality remained intact when security was enabled. This work should increase awareness and accelerate the adoption of the proposed security mechanism in the power industry

On the quality of VoIP with DCCP for satellite communications

We present experimental results for the performance of selected voice codecs using DCCP with CCID4 congestion control over a satellite link. We evaluate the performance of both constant and variable data rate speech codecs for a number of simultaneous calls using the ITU E-model. We analyse the sources of packet losses and additionally analyse the effect of jitter which is one of the crucial parameters contributing to VoIP quality and has, to the best of our knowledge, not been considered previously in the published DCCP performance results. We propose modifications to the CCID4 algorithm and demonstrate how these improve the VoIP performance, without the need for additional link information other than what is already monitored by CCID4. We also demonstrate the fairness of the proposed modifications to other flows. Although the recently adopted changes to TFRC specification alleviate some of the performance issues for VoIP on satellite links, we argue that the characteristics of commercial satellite links necessitate consideration of further improvements. We identify the additional benefit of DCCP when used in VoIP admission control mechanisms and draw conclusions about the advantages and disadvantages of the proposed DCCP/CCID4 congestion control mechanism for use with VoIP applications

Analysis of Controlled Packet Departure to Support Ethernet Fronthaul Synchronization via PTP

The synchronization accuracy achieved via the IEEE 1588 Precision Time Protocol (PTP) in packet-based fronthaul networks is substantially impaired by packet delay variation (PDV). Nevertheless, in the particular case of deployment over tree topologies, it is known that PDV can be avoided by controlling the departure of PTP packets such that they experience close to constant delays over the fronthaul. This paper analyzes controlled PTP departure under constraints that are peculiar to a fronthaul scenario of interest and considering that radio traffic itself behaves as background traffic relative to PTP. Since the method involves buffering of radio traffic prior to controlled PTP transmissions, its impact on buffer sizes at the baseband and radio units, and the corresponding increase in fronthaul latency are also analyzed. In the end, results collected through a self-developed FPGA-based testbed are presented.This work was supported in part by the Innovation Center, Ericsson Telecomunicac¸ ˜oes S.A., Brazil, CNPq/Capes, Brazil, and by the European Union through the H2020 collaborative Europe/Taiwan research project 5G-CORAL (grant agreement no. 761586)