93 research outputs found
Realization of Low-Voltage Modified CBTA and Design of Cascadable Current-Mode All-Pass Filter
In this paper, a low voltage modified current backward transconductance amplifier (MCBTA) and a novel first-order current-mode (CM) all-pass filter are presented. The MCBTA can operate with ±0.9 V supply voltage and the total power consumption of MCBTA is 1.27 mW. The presented all-pass filter employs single MCBTA, a grounded resistor and a grounded capacitor. The circuit possesses low input and high output impedances which make it ideal for current-mode systems. The presented all-pass filter circuit can be made electronically tunable due to the bias current of the MCBTA. Non-ideal study along with simulation results are given for validation purpose. Further, an nth-order cascadable all-pass filter is also presented. It uses n MCBTAs, n grounded resistors and n grounded capacitors. The performance of the proposed circuits is demonstrated by using PSPICE simulations based on the 0.18 µm TSMC level-7 CMOS technology parameters
A Low-Voltage Electronically Tunable MOSFET-C Voltage-Mode First-Order All-Pass Filter Design
This paper presents a simple electronically tunable voltage-mode first-order all-pass filter realization with MOSFET-C technique. In comparison to the classical MOSFET-C filter circuits that employ active elements including large number of transistors the proposed circuit is only composed of a single two n-channel MOSFET-based inverting voltage buffer, three passive components, and one NMOS-based voltage-controlled resistor, which is with advantage used to electronically control the pole frequency of the filter in range 103 kHz to 18.3 MHz. The proposed filter is also very suitable for low-voltage operation, since between its supply rails it uses only two MOSFETs. In the paper the effect of load is investigated. In addition, in order to suppress the effect of non-zero output resistance of the inverting voltage buffer, two compensation techniques are also introduced. The theoretical results are verified by SPICE simulations using PTM 90 nm level-7 CMOS process BSIM3v3 parameters, where +/- 0.45 V supply voltages are used. Moreover, the behavior of the proposed filter was also experimentally measured using readily available array transistors CD4007UB by Texas Instruments
Current and Voltage Mode Multiphase Sinusoidal Oscillators Using CBTAs
Current-mode (CM) and voltage-mode (VM) multiphase sinusoidal oscillator (MSO) structures using current backward transconductance amplifier (CBTA) are proposed. The proposed oscillators can generate n current or voltage signals (n being even or odd) equally spaced in phase. n+1 CBTAs, n grounded capacitors and a grounded resistor are used for nth-state oscillator. The oscillation frequency can be independently controlled through transconductance (gm) of the CBTAs which are adjustable via their bias currents. The effects caused by the non-ideality of the CBTA on the oscillation frequency and condition have been analyzed. The performance of the proposed circuits is demonstrated on third-stage and fifth-stage MSOs by using PSPICE simulations based on the 0.25 µm TSMC level-7 CMOS technology parameters
Low-Voltage High-Linearity Wideband Current Differencing Transconductance Amplifier and Its Application on Current-Mode Active Filter
A low-voltage high-linearity wideband current differencing transconductance amplifier (CDTA) is presented in this paper. The CDTA consists of a current differencing circuit and a cross-coupling transconductance circuit. The PSPICE simulations of the proposed CDTA show a good performance: -3dB frequency bandwith is about 900 MHz, low power consumption is 2.48 mW, input current linear range is ±100 µA and low current-input resistance is less than 20 Ω, high current-output resistance is more than 3 MΩ. PSpice simulations for a current-mode universal filter and a proposed high-order filter are also conducted, and the results verify the validity of the proposed CDTA
High-Order Current-Mode and Transimpedance-Mode Universal Filters with Multiple-Inputs and Two-Outputs Using MOCCIIs
A high-order current-mode and transimpedance-mode universal filter with multiple-inputs and two-outputs based on multiple output second-generation current conveyors (MOCCIIs) is introduced. By choosing the input current terminals appropriately, the current-mode and transimpedance-mode lowpass, bandpass, highpass, notch or allpass filters can be obtained without component matching conditions. The proposed nth order universal filter requires (n+1) MOCCIIs, (n+1) resistors and n grounded capacitors. As examples, the first-order, biquadratic and third-order universal filters are given and compared with previous published works
Design of adaptive analog filters for magnetic front-end read channels
Esta tese estuda o projecto e o comportamento de filtros em tempo contínuo de
muito-alta-frequência. A motivação deste trabalho foi a investigação de soluções de filtragem
para canais de leitura em sistemas de gravação e reprodução de dados em suporte
magnético, com custos e consumo (tamanho total inferior a 1 mm2 e consumo inferior a
1mW/polo), inferiores aos circuitos existentes. Nesse sentido, tal como foi feito neste
trabalho, o rápido desenvolvimento das tecnologias de microelectrónica suscitou esforços
muito significativos a nível mundial com o objectivo de se investigarem novas técnicas
de realização de filtros em circuito integrado monolítico, especialmente em tecnologia
CMOS (Complementary Metal Oxide Semiconductor). Apresenta-se um estudo comparativo
a diversos níveis hierárquicos do projecto, que conduziu à realização e caracterização
de soluções com as características desejadas.
Num primeiro nível, este estudo aborda a questão conceptual da gravação e transmissão
de sinal bem como a escolha de bons modelos matemáticos para o tratamento da
informação e a minimização de erro inerente às aproximações na conformidade aos princípios
físicos dos dispositivos caracterizados.
O trabalho principal da tese é focado nos níveis hierárquicos da arquitectura do
canal de leitura e da realização em circuito integrado do seu bloco principal – o bloco de
filtragem. Ao nível da arquitectura do canal de leitura, apresenta-se um estudo alargado
sobre as metodologias existentes de adaptação de sinal e recuperação de dados em suporte
magnético. Este desígnio aparece no âmbito da proposta de uma solução de baixo custo,
baixo consumo, baixa tensão de alimentação e baixa complexidade, alicerçada em tecnologia
digital CMOS, para a realização de um sistema DFE (Decision Feedback Equalization)
com base na igualização de sinal utilizando filtros integrados analógicos em tempo
contínuo.
Ao nível do projecto de realização do bloco de filtragem e das técnicas de implementação
de filtros e dos seus blocos constituintes em circuito integrado, concluiu-se que
a técnica baseada em circuitos de transcondutância e condensadores, também conhecida como filtros gm-C (ou transcondutância-C), é a mais adequada para a realização de filtros
adaptativos em muito-alta-frequência. Definiram-se neste nível hierárquico mais baixo,
dois subníveis de aprofundamento do estudo no âmbito desta tese, nomeadamente: a pesquisa
e análise de estruturas ideais no projecto de filtros recorrendo a representações no
espaço de estados; e, o estudo de técnicas de realização em tecnologia digital CMOS de
circuitos de transcondutância para a implementação de filtros integrados analógicos em
tempo contínuo.
Na sequência deste estudo, apresentam-se e comparam-se duas estruturas de filtros
no espaço de estados, correspondentes a duas soluções alternativas para a realização de
um igualador adaptativo realizado por um filtro contínuo passa-tudo de terceira ordem,
para utilização num canal de leitura de dados em suporte magnético.
Como parte constituinte destes filtros, apresenta-se uma técnica de realização de
circuitos de transcondutância, e de realização de condensadores lineares usando matrizes
de transístores MOSFET para processamento de sinal em muito-alta-frequência realizada
em circuito integrado usando tecnologia digital CMOS submicrométrica. Apresentam-se
métodos de adaptação automática capazes de compensar os erros face aos valores nominais
dos componentes, devidos às tolerâncias inerentes ao processo de fabrico, para os
quais apresentamos os resultados de simulação e de medição experimental obtidos.
Na sequência deste estudo, resultou igualmente a apresentação de um circuito passível
de constituir uma solução para o controlo de posicionamento da cabeça de leitura
em sistemas de gravação/reprodução de dados em suporte magnético. O bloco proposto
é um filtro adaptativo de primeira ordem, com base nos mesmos circuitos de transcondutância
e técnicas de igualação propostos e utilizados na implementação do filtro adaptativo
de igualação do canal de leitura.
Este bloco de filtragem foi projectado e incluído num circuito integrado (Jaguar) de
controlo de posicionamento da cabeça de leitura realizado para a empresa ATMEL em
Colorado Springs, e incluído num produto comercial em parceria com uma empresa escocesa
utilizado em discos rígidos amovíveis.This thesis studies the design and behavior of continuous-time very-high-frequency
filters. The motivation of this work was the search for filtering solutions for the readchannel
in recording and reproduction of data on magnetic media systems, with costs and
consumption (total size less than 1 mm2 and consumption under 1mW/pole), lower than
the available circuits. Accordingly, as was done in this work, the rapid development of
microelectronics technology raised very significant efforts worldwide in order to investigate
new techniques for implementing such filters in monolithic integrated circuit, especially
in CMOS technology (Complementary Metal Oxide Semiconductor). We present
a comparative study on different hierarchical levels of the project, which led to the realization
and characterization of solutions with the desired characteristics.
In the first level, this study addresses the conceptual question of recording and
transmission of signal and the choice of good mathematical models for the processing of
information and minimization of error inherent in the approaches and in accordance with
the principles of the characterized physical devices.
The main work of this thesis is focused on the hierarchical levels of the architecture
of the read channel and the integrated circuit implementation of its main block - the filtering
block. At the architecture level of the read channel this work presents a comprehensive
study on existing methodologies of adaptation and signal recovery of data on
magnetic media. This project appears in the sequence of the proposed solution for a lowcost,
low consumption, low voltage, low complexity, using CMOS digital technology for
the performance of a DFE (Decision Feedback Equalization) based on the equalization of
the signal using integrated analog filters in continuous time.
At the project level of implementation of the filtering block and techniques for implementing
filters and its building components, it was concluded that the technique based
on transconductance circuits and capacitors, also known as gm-C filters is the most appropriate
for the implementation of very-high-frequency adaptive filters. We defined in
this lower level, two sub-levels of depth study for this thesis, namely: research and analysis
of optimal structures for the design of state-space filters, and the study of techniques for the design of transconductance cells in digital CMOS circuits for the implementation
of continuous time integrated analog filters.
Following this study, we present and compare two filtering structures operating in
the space of states, corresponding to two alternatives for achieving a realization of an
adaptive equalizer by the use of a continuous-time third order allpass filter, as part of a
read-channel for magnetic media devices.
As a constituent part of these filters, we present a technique for the realization of
transconductance circuits and for the implementation of linear capacitors using arrays of
MOSFET transistors for signal processing in very-high-frequency integrated circuits using
sub-micrometric CMOS technology. We present methods capable of automatic adjustment
and compensation for deviation errors in respect to the nominal values of the
components inherent to the tolerances of the fabrication process, for which we present
the simulation and experimental measurement results obtained.
Also as a result of this study, is the presentation of a circuit that provides a solution
for the control of the head positioning on recording/playback systems of data on magnetic
media. The proposed block is an adaptive first-order filter, based on the same transconductance
circuits and equalization techniques proposed and used in the implementation
of the adaptive filter for the equalization of the read channel.
This filter was designed and included in an integrated circuit (Jaguar) used to control
the positioning of the read-head done for ATMEL company in Colorado Springs, and
part of a commercial product used in removable hard drives fabricated in partnership with a Scottish company
Electronically Tunable Current-mode Multiphase Sinusoidal Oscillator Employing CCCDTA-based Allpass Filters with Only Grounded Passive Elements
This study describes the design of a multiphase sinusoidal oscillator (MSO) using CCCDTA-based allpass filters with grounded capacitors. The oscillation condition and oscillation frequency can be electronically/orthogonally controlled. The proposed MSO provides 2n (n>2) phase signals that are equally spaced in phase and of equal amplitude. The circuit requires one CCCDTA, one electronic resistor and one grounded capacitor per phase and no additional current amplifier and floating elements. High output impedances of the configuration enable the circuit to be cascaded to the current-mode circuit without additional current buffers. The effects of the non-idealities of the CCCDTA-allpass sections were also studied. The results of PSPICE simulations using CMOS CCCDTA are presented, demonstrating their consistency with theoretical assumptions
Available Techniques for Magnetic Hard Disk Drive Read Channel Equalization
This paper presents an extensive, non-exhaustive, study of available hard disk drive read channel equalization techniques used in the storage and readback of magnetically stored information. The physical elements and basic principles of the storage processes are introduced together with the basic theoretical definitions and models. Both read and write processes in magnetic storage are explained along with the definition of simple key concepts such as user bit density, intersymbol interference, linear and areal density, read head pulse response models, and coding algorithm
Fractionally-addressed delay lines
While traditional implementations of variable-length digital delay lines are
based on a circular buffer accessed by two pointers, we propose an
implementation where a single fractional pointer is used both for read and
write operations. On modern general-purpose architectures, the proposed method
is nearly as efficient as the popularinterpolated circular buffer, and it
behaves well for delay-length modulations commonly found in digital audio
effects. The physical interpretation of the new implementation shows that it is
suitable for simulating tension or density modulations in wave-propagating
media.Comment: 11 pages, 19 figures, to be published in IEEE Transactions on Speech
and Audio Processing Corrected ACM-clas
Unity / variable gain voltage - mode / current - mode first - order all - pass filters using single Dual - X second generation current conveyor
In this paper, two new general topologies for realizing voltage-mode (VM)/current-mode (CM) first-order all-pass filter transfer functions (TFs) are presented. The proposed topologies use single dual-X second-generation current conveyor (DXCCII) and three impedances Z(1), Z(2) and Z(3). Based on the selection of Z(1), Z(2) and Z(3), new VM and CM all-pass filters with unity or variable gains are obtained. The proposed VM/CM filters have high-input/high-output impedances which provide easy cascading at their input/output terminals, respectively. Non-ideal gain and parasitic impedance effects, associated with actual DXCCII implementation, on the performance of the developed topologies are also included. Finally, simulation program with integrated circuit emphasis (SPICE) simulation results based on level 49, 0.25 mu m TSMC complementary metal-oxide-semiconductor (CMOS) technology parameters are given to confirm the theory
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