2,864 research outputs found

    A Survey of Techniques for Improving Security of GPUs

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    Graphics processing unit (GPU), although a powerful performance-booster, also has many security vulnerabilities. Due to these, the GPU can act as a safe-haven for stealthy malware and the weakest `link' in the security `chain'. In this paper, we present a survey of techniques for analyzing and improving GPU security. We classify the works on key attributes to highlight their similarities and differences. More than informing users and researchers about GPU security techniques, this survey aims to increase their awareness about GPU security vulnerabilities and potential countermeasures

    Framework of Hardware Trojan Detection Leveraging Structural Checking Tool

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    Since there is a significant demand for obtaining third-party soft Intellectual Property (IP) by first-party integrated circuit (IC) vendors, it is becoming easier for adversaries to insert malicious logic known as hardware Trojans into designs. Due to this, vendors need to find ways to screen the third-party IPs for possible security threats and then mitigate them. The development of the Structural Checking (SC) tool provides a solution to this issue. This tool analyzes the structure of an unknown soft IP design and creates a network of all the signals within the design and how they are connected to each other. In addition, these signals will be assigned with assets. Assets describe the central role of a signal in the entire design. These assets are then used to create asset patterns, which will be crucial for this thesis research. Previous research on SC tool focuses on Trojan detection by comparing and matching an unknown design to a trusted design in a Golden Reference Library. In this thesis research, another method of Trojan detection has been implemented in the SC tool, which focuses on recognizing specific asset patterns that mainly exist in Trojan-infested designs. These specific asset patterns can then be used to check against unknown designs for Trojans without using a Golden Reference Library. This thesis improves this method by creating a new framework for easily identifying the unique Trojan asset patterns

    Network Interface Design for Network-on-Chip

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    In the culture of globalized integrated circuit (IC, a.k.a chip) production, the use of Intellectual Property (IP) cores, computer aided design tools (CAD) and testing services from un-trusted vendors are prevalent to reduce the time to market. Unfortunately, the globalized business model potentially creates opportunities for hardware tampering and modification from adversary, and this tampering is known as hardware Trojan (HT). Network-on-chip (NoC) has emerged as an efficient on-chip communication infrastructure. In this work, the security aspects of NoC network interface (NI), one of the most critical components in NoC will be investigated and presented. Particularly, the NI design, hardware attack models and countermeasures for NI in a NoC system are explored. An OCP compatible NI is implemented in an IBM0.18ìm CMOS technology. The synthesis results are presented and compared with existing literature. Second, comprehensive hardware attack models targeted for NI are presented from system level to circuit level. The impact of hardware Trojans on NoC functionality and performance are evaluated. Finally, a countermeasure method is proposed to address the hardware attacks in NIs
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