On an Improved Diagnosis Program

Coordinated Science Laboratory was formerly known as Control Systems LaboratoryContract DA-28-043-AMC-00073(E

What is the Path to Fast Fault Simulation?

Motivated by the recent advances in fast fault simulation techniques for large combinational circuits, a panel discussion has been organized for the 1988 International Test Conference. This paper is a collective account of the position statements offered by the panelists

Fault detection on sequential machines

This paper presents an algorithm for deriving an optimum test sequence for detecting faults in a synchronous machine. In this study, the flow table is used as a tool to generate the fault detection tests. The fault stuck-at-1 (or stuck-at-0 ) is said to be present when a permanent signal valued 1 (or 0) appears on a component of the machine. Only single faults are treated . The result of the procedure is one or more test sequences guaranteed to detect a set of faults (Fp). First, sequential machines with feedback lines as memory elements are considered . Then the memory elements are changed to R-S flip-flops. Finally, several suggestions for further work are made --Abstract, Page ii

Анализ методов автоматизированного синтеза тестов

Производится сравнительный анализ известных методов автоматизированного синтеза тестов для цифровых устройств произвольной структуры

Анализ методов автоматизированного синтеза тестов

Производится сравнительный анализ известных методов автоматизированного синтеза тестов для цифровых устройств произвольной структуры

A survey of an introduction to fault diagnosis algorithms

This report surveys the field of diagnosis and introduces some of the key algorithms and heuristics currently in use. Fault diagnosis is an important and a rapidly growing discipline. This is important in the design of self-repairable computers because the present diagnosis resolution of its fault-tolerant computer is limited to a functional unit or processor. Better resolution is necessary before failed units can become partially reuseable. The approach that holds the greatest promise is that of resident microdiagnostics; however, that presupposes a microprogrammable architecture for the computer being self-diagnosed. The presentation is tutorial and contains examples. An extensive bibliography of some 220 entries is included

A comparison of different criteria for selecting binary tests in diagnostic keys

The problem of selecting tests to be used in nonprobabilistic binary diagnostic keys is discussed. Five selection criteria are compared and it is shown that all except a new criterion suffer from some deficiency. This criterion cannot be extended easily to cope with multi-response tests but another criterion, which behaves satisfactorily with binary tests, can be extended in some circumstances. The only criterion which can always be used with multi-response tests is least satisfactory for binary tests

A procedure for ranking diagnostic test inputs

Procedure for ranking diagnostic test inputs in digital computer

Hierarchical Simulation to Assess Hardware and Software Dependability

This thesis presents a method for conducting hierarchical simulations to assess system hardware and software dependability. The method is intended to model embedded microprocessor systems. A key contribution of the thesis is the idea of using fault dictionaries to propagate fault effects upward from the level of abstraction where a fault model is assumed to the system level where the ultimate impact of the fault is observed. A second important contribution is the analysis of the software behavior under faults as well as the hardware behavior. The simulation method is demonstrated and validated in four case studies analyzing Myrinet, a commercial, high-speed networking system. One key result from the case studies shows that the simulation method predicts the same fault impact 87.5% of the time as is obtained by similar fault injections into a real Myrinet system. Reasons for the remaining discrepancy are examined in the thesis. A second key result shows the reduction in the number of simulations needed due to the fault dictionary method. In one case study, 500 faults were injected at the chip level, but only 255 propagated to the system level. Of these 255 faults, 110 shared identical fault dictionary entries at the system level and so did not need to be resimulated. The necessary number of system-level simulations was therefore reduced from 500 to 145. Finally, the case studies show how the simulation method can be used to improve the dependability of the target system. The simulation analysis was used to add recovery to the target software for the most common fault propagation mechanisms that would cause the software to hang. After the modification, the number of hangs was reduced by 60% for fault injections into the real system

Progress report for march, april, and may 1964

Ionospheric absorption, gas adsorption on tungsten, ion production, and superconductivity of metal