New architecture for high data rate turbo decoding of product codes

International audienceThis paper presents a new circuit architecture for turbo decoding, which achieves very high data rates when using product codes as error correcting codes. Although this architecture is independent of the elementary code (convolutional or block) used and of the corresponding decoding algorithms, we focus here on the case of product codes. This innovative circuit architecture stores several data at the same adress and performs parallel decoding to increase the data rate. It is able to process several date simultaneously with one memory (classical designs require m memories); its latency decreases when the amont of data processed simultaneously is large. We present results on block turbo decoder designs of 2-data, 4-date and 8-data decoders (where 2, 4 and 8 are the number of data symbos processed simultaneously). For each decoder circuit, the latency is decreased, the area of the processing unit is inscreased by a factor m and the critical path and memory size are constant (the data rate is increased by m2 if we have m paralel decoders)

Comparison of Polar Decoders with Existing Low-Density Parity-Check and Turbo Decoders

Polar codes are a recently proposed family of provably capacity-achieving error-correction codes that received a lot of attention. While their theoretical properties render them interesting, their practicality compared to other types of codes has not been thoroughly studied. Towards this end, in this paper, we perform a comparison of polar decoders against LDPC and Turbo decoders that are used in existing communications standards. More specifically, we compare both the error-correction performance and the hardware efficiency of the corresponding hardware implementations. This comparison enables us to identify applications where polar codes are superior to existing error-correction coding solutions as well as to determine the most promising research direction in terms of the hardware implementation of polar decoders.Comment: Fixes small mistakes from the paper to appear in the proceedings of IEEE WCNC 2017. Results were presented in the "Polar Coding in Wireless Communications: Theory and Implementation" Worksho

High-Rate Space-Time Coded Large MIMO Systems: Low-Complexity Detection and Channel Estimation

In this paper, we present a low-complexity algorithm for detection in high-rate, non-orthogonal space-time block coded (STBC) large-MIMO systems that achieve high spectral efficiencies of the order of tens of bps/Hz. We also present a training-based iterative detection/channel estimation scheme for such large STBC MIMO systems. Our simulation results show that excellent bit error rate and nearness-to-capacity performance are achieved by the proposed multistage likelihood ascent search (M-LAS) detector in conjunction with the proposed iterative detection/channel estimation scheme at low complexities. The fact that we could show such good results for large STBCs like 16x16 and 32x32 STBCs from Cyclic Division Algebras (CDA) operating at spectral efficiencies in excess of 20 bps/Hz (even after accounting for the overheads meant for pilot based training for channel estimation and turbo coding) establishes the effectiveness of the proposed detector and channel estimator. We decode perfect codes of large dimensions using the proposed detector. With the feasibility of such a low-complexity detection/channel estimation scheme, large-MIMO systems with tens of antennas operating at several tens of bps/Hz spectral efficiencies can become practical, enabling interesting high data rate wireless applications.Comment: v3: Performance/complexity comparison of the proposed scheme with other large-MIMO architectures/detectors has been added (Sec. IV-D). The paper has been accepted for publication in IEEE Journal of Selected Topics in Signal Processing (JSTSP): Spl. Iss. on Managing Complexity in Multiuser MIMO Systems. v2: Section V on Channel Estimation is update

On chip interconnects for multiprocessor turbo decoding architectures

International audienc

Self-concatenated coding and multi-functional MIMO aided H.264 video telephony

Abstract— Robust video transmission using iteratively detected Self-Concatenated Coding (SCC), multi-dimensional Sphere Packing (SP) modulation and Layered Steered Space-Time Coding (LSSTC) is proposed for H.264 coded video transmission over correlated Rayleigh fading channels. The self-concatenated convolutional coding (SECCC) scheme is composed of a Recursive Systematic Convolutional (RSC) code and an interleaver, which is used to randomise the extrinsic information exchanged between the self-concatenated constituent RSC codes. Additionally, a puncturer is employed for improving the achievable bandwidth efficiency. The convergence behaviour of the MIMO transceiver advocated is investigated with the aid of Extrinsic Information Transfer (EXIT) charts. The proposed system exhibits an Eb /N0 gain of about 9 dB at the PSNR degradation point of 1 dB in comparison to the identical-rate benchmarker scheme