94 research outputs found
Monitoring for a decidable fragment of MTL-â«
Temporal logics targeting real-time systems are traditionally undecidable. Based on a restricted fragment of MTL-R, we propose a new approach for the runtime veriïŹcation of hard real-time systems. The novelty of our technique is that it is based on incremental evaluation, allowing us to eâ”ectively treat duration properties (which play a crucial role in real-time systems). We describe the two levels of operation of our approach: offline simpliïŹcation by quantiïŹer removal techniques; and online evaluation of a three-valued interpretation for formulas of our fragment. Our experiments show the applicability of this mechanism as well as the validity of the provided complexity results
On the Complexity of Temporal-Logic Path Checking
Given a formula in a temporal logic such as LTL or MTL, a fundamental problem
is the complexity of evaluating the formula on a given finite word. For LTL,
the complexity of this task was recently shown to be in NC. In this paper, we
present an NC algorithm for MTL, a quantitative (or metric) extension of LTL,
and give an NCC algorithm for UTL, the unary fragment of LTL. At the time of
writing, MTL is the most expressive logic with an NC path-checking algorithm,
and UTL is the most expressive fragment of LTL with a more efficient
path-checking algorithm than for full LTL (subject to standard
complexity-theoretic assumptions). We then establish a connection between LTL
path checking and planar circuits, which we exploit to show that any further
progress in determining the precise complexity of LTL path checking would
immediately entail more efficient evaluation algorithms than are known for a
certain class of planar circuits. The connection further implies that the
complexity of LTL path checking depends on the Boolean connectives allowed:
adding Boolean exclusive or yields a temporal logic with P-complete
path-checking problem
Monitoring for a decidable fragment of MTLD
The 15th International Conference on Runtime Verification (RV'15). 22-25 September. Vienna, Austria.Temporal logics targeting real-time systems are traditionally undecidable. Based on a restricted fragment of MTLD,
we propose a new approach for the runtime verification of hard real-time systems. The novelty of our technique is
that it is based on incremental evaluation, allowing us to effectively treat duration properties (which play a crucial
role in real-time systems). We describe the two levels of operation of our approach: offline simplification by
quantifier removal techniques; and online evaluation of a three-valued interpretation for formulas of our fragment.
Our experiments show the applicability of this mechanism as well as the validity of the provided complexity results
On verifying timed hyperproperties
We study the satisfiability and model-checking problems for timed
hyperproperties specified with HyperMTL, a timed extension of HyperLTL.
Depending on whether interleaving of events in different traces is allowed, two
possible semantics can be defined for timed hyperproperties: asynchronous and
synchronous. While the satisfiability problem can be decided similarly to
HyperLTL regardless of the choice of semantics, we show that the model-checking
problem, unless the specification is alternation-free, is undecidable even when
very restricted timing constraints are allowed. On the positive side, we show
that model checking HyperMTL with quantifier alternations is possible under
certain conditions in the synchronous semantics, or when there is a fixed bound
on the length of the time domain.EP/K026399/1 and EP/P020011/
Logic-based schedulability analysis for compositional hard real-time embedded systems
This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in SIGBED Review, VOL.12, ISS.1, http://doi.acm.org/10.1145/2752801.2752808Over the past decades several approaches for schedu- lability analysis have been proposed for both uniprocessor and multi-processor real-time systems. Although different techniques are employed, very little has been put forward in using formal specifications, with the consequent possibility for misinterpretations or ambiguities in the problem statement. Using a logic based approach to schedulability analysis in the design of hard real-time systems eases the synthesis of correct-by- construction procedures for both static and dynamic verification processes. In this paper we propose a novel approach to schedulability analysis based on a timed temporal logic with time durations. Our approach subsumes classical methods for uniprocessor scheduling analysis over compositional resource models by providing the developer with counter-examples, and by ruling out schedules that cause unsafe violations on the system. We also provide an example showing the effectiveness of our proposal.This work was partially supported by National Funds through FCT (Portuguese Foundation for Science and Technology) and by ERDF (European Regional Development Fund) through COMPETE (Operational Programme âThematic Fac- tors of Competitivenessâ), within projects Ref. FCOMP-01- 0124-FEDER-022701 (CISTER), FCOMP-01-0124-FEDER- 015006 (VIPCORE) and FCOMP-01-0124-FEDER-020486 (AVIACC)
Revisiting timed logics with automata modalities
© 2019 ACM. It is well known that (timed) Ï-regular properties such as 'p holds at every even position' and 'p occurs at least three times within the next 10 time units' cannot be expressed in Metric Interval Temporal Logic (MITL) and Event Clock Logic (ECL). A standard remedy to this deficiency is to extend these with modalities defined in terms of automata. In this paper, we show that the logics EMITL0, â (adding non-deterministic finite automata modalities into the fragment of MITL with only lower- and upper-bound constraints) and EECL (adding automata modalities into ECL) are already as expressive as EMITL (full MITL with automata modalities). In particular, the satisfiability and model-checking problems for EMITL0, â and EECL are PSPACE-complete, whereas the same problems for EMITL are EXPSPACE-complete. We also provide a simple translation from EMITL0, â to diagonal-free timed automata, which enables practical satisfiability and model checking based on off-the-shelf tools
LNCS
In this paper we propose a novel technique for constructing timed automata from properties expressed in the logic mtl, under bounded-variability assumptions. We handle full mtl and include all future operators. Our construction is based on separation of the continuous time monitoring of the input sequence and discrete predictions regarding the future. The separation of the continuous from the discrete allows us to determinize our automata in an exponential construction that does not increase the number of clocks. This leads to a doubly exponential construction from mtl to deterministic timed automata, compared with triply exponential using existing approaches. We offer an alternative to the existing approach to linear real-time model checking, which has never been implemented. It further offers a unified framework for model checking, runtime monitoring, and synthesis, in an approach that can reuse tools, implementations, and insights from the discrete setting
LNCS
Imprecision in timing can sometimes be beneficial: Metric interval temporal logic (MITL), disabling the expression of punctuality constraints, was shown to translate to timed automata, yielding an elementary decision procedure. We show how this principle extends to other forms of dense-time specification using regular expressions. By providing a clean, automaton-based formal framework for non-punctual languages, we are able to recover and extend several results in timed systems. Metric interval regular expressions (MIRE) are introduced, providing regular expressions with non-singular duration constraints. We obtain that MIRE are expressively complete relative to a class of one-clock timed automata, which can be determinized using additional clocks. Metric interval dynamic logic (MIDL) is then defined using MIRE as temporal modalities. We show that MIDL generalizes known extensions of MITL, while translating to timed automata at comparable cost
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