Adaptive OFDM System Design For Cognitive Radio

Recently, Cognitive Radio has been proposed as a promising technology to improve spectrum utilization. A highly flexible OFDM system is considered to be a good candidate for the Cognitive Radio baseband processing where individual carriers can be switched off for frequencies occupied by a licensed user. In order to support such an adaptive OFDM system, we propose a Multiprocessor System-on-Chip (MPSoC) architecture which can be dynamically reconfigured. However, the complexity and flexibility of the baseband processing makes the MPSoC design a difficult task. This paper presents a design technology for mapping flexible OFDM baseband for Cognitive Radio on a multiprocessor System-on-Chip (MPSoC)

Performance of the Fully Digital FPGA-based Front-End Electronics for the GALILEO Array

In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. The digital processing of the data from the GALILEO germanium detectors has demonstrated the capability to achieve an energy resolution of 1.53 per mil at an energy of 1.33 MeV.Comment: 5 pages, 6 figures, preprint version of IEEE Transactions on Nuclear Science paper submitted for the 19th IEEE Real Time Conferenc

Complex networks: new trends for the analysis of brain connectivity

Today, the human brain can be studied as a whole. Electroencephalography, magnetoencephalography, or functional magnetic resonance imaging techniques provide functional connectivity patterns between different brain areas, and during different pathological and cognitive neuro-dynamical states. In this Tutorial we review novel complex networks approaches to unveil how brain networks can efficiently manage local processing and global integration for the transfer of information, while being at the same time capable of adapting to satisfy changing neural demands.Comment: Tutorial paper to appear in the Int. J. Bif. Chao

Verifying service continuity in a satellite reconfiguration procedure: application to a satellite

The paper discusses the use of the TURTLE UML profile to model and verify service continuity during dynamic reconfiguration of embedded software, and space-based telecommunication software in particular. TURTLE extends UML class diagrams with composition operators, and activity diagrams with temporal operators. Translating TURTLE to the formal description technique RT-LOTOS gives the profile a formal semantics and makes it possible to reuse verification techniques implemented by the RTL, the RT-LOTOS toolkit developed at LAAS-CNRS. The paper proposes a modeling and formal validation methodology based on TURTLE and RTL, and discusses its application to a payload software application in charge of an embedded packet switch. The paper demonstrates the benefits of using TURTLE to prove service continuity for dynamic reconfiguration of embedded software

The "MIND" Scalable PIM Architecture

MIND (Memory, Intelligence, and Network Device) is an advanced parallel computer architecture for high performance computing and scalable embedded processing. It is a Processor-in-Memory (PIM) architecture integrating both DRAM bit cells and CMOS logic devices on the same silicon die. MIND is multicore with multiple memory/processor nodes on each chip and supports global shared memory across systems of MIND components. MIND is distinguished from other PIM architectures in that it incorporates mechanisms for efficient support of a global parallel execution model based on the semantics of message-driven multithreaded split-transaction processing. MIND is designed to operate either in conjunction with other conventional microprocessors or in standalone arrays of like devices. It also incorporates mechanisms for fault tolerance, real time execution, and active power management. This paper describes the major elements and operational methods of the MIND architecture

Multiple dynamical time-scales in networks with hierarchically nested modular organization

Many natural and engineered complex networks have intricate mesoscopic organization, e.g., the clustering of the constituent nodes into several communities or modules. Often, such modularity is manifested at several different hierarchical levels, where the clusters defined at one level appear as elementary entities at the next higher level. Using a simple model of a hierarchical modular network, we show that such a topological structure gives rise to characteristic time-scale separation between dynamics occurring at different levels of the hierarchy. This generalizes our earlier result for simple modular networks, where fast intra-modular and slow inter-modular processes were clearly distinguished. Investigating the process of synchronization of oscillators in a hierarchical modular network, we show the existence of as many distinct time-scales as there are hierarchical levels in the system. This suggests a possible functional role of such mesoscopic organization principle in natural systems, viz., in the dynamical separation of events occurring at different spatial scales.Comment: 10 pages, 4 figure

Rich-club network topology to minimize synchronization cost due to phase difference among frequency-synchronized oscillators

Functions of some networks, such as power grids and large-scale brain networks, rely on not only frequency synchronization, but also phase synchronization. Nevertheless, even after the oscillators reach to frequency-synchronized status, phase difference among oscillators often shows non-zero constant values. Such phase difference potentially results in inefficient transfer of power or information among oscillators, and avoid proper and efficient functioning of the network. In the present study, we newly define synchronization cost by the phase difference among the frequency-synchronized oscillators, and investigate the optimal network structure with the minimum synchronization cost through rewiring-based optimization. By using the Kuramoto model, we demonstrate that the cost is minimized in a network topology with rich-club organization, which comprises the densely-connected center nodes and peripheral nodes connecting with the center module. We also show that the network topology is characterized by its bimodal degree distribution, which is quantified by Wolfson's polarization index. Furthermore, we provide analytical interpretation on why the rich-club network topology is related to the small amount of synchronization cost.Comment: 4 figures + one appendix figur