1,390 research outputs found
Refining SCJ Mission Specifications into Parallel Handler Designs
Safety-Critical Java (SCJ) is a recent technology that restricts the
execution and memory model of Java in such a way that applications can be
statically analysed and certified for their real-time properties and safe use
of memory. Our interest is in the development of comprehensive and sound
techniques for the formal specification, refinement, design, and implementation
of SCJ programs, using a correct-by-construction approach. As part of this
work, we present here an account of laws and patterns that are of general use
for the refinement of SCJ mission specifications into designs of parallel
handlers used in the SCJ programming paradigm. Our notation is a combination of
languages from the Circus family, supporting state-rich reactive models with
the addition of class objects and real-time properties. Our work is a first
step to elicit laws of programming for SCJ and fits into a refinement strategy
that we have developed previously to derive SCJ programs.Comment: In Proceedings Refine 2013, arXiv:1305.563
The Buffered \pi-Calculus: A Model for Concurrent Languages
Message-passing based concurrent languages are widely used in developing
large distributed and coordination systems. This paper presents the buffered
-calculus --- a variant of the -calculus where channel names are
classified into buffered and unbuffered: communication along buffered channels
is asynchronous, and remains synchronous along unbuffered channels. We show
that the buffered -calculus can be fully simulated in the polyadic
-calculus with respect to strong bisimulation. In contrast to the
-calculus which is hard to use in practice, the new language enables easy
and clear modeling of practical concurrent languages. We encode two real-world
concurrent languages in the buffered -calculus: the (core) Go language and
the (Core) Erlang. Both encodings are fully abstract with respect to weak
bisimulations
Nondeterminism and Guarded Commands
The purpose of this paper is to discuss the relevance of nondeterminism in
computer science, with a special emphasis on Dijkstra's guarded commands
language.Comment: 34 pages. This is authors' version of Chapter 8 of the book K.R. Apt
and C.A.R. Hoare (editors), Edsger Wybe Dijkstra: His Life, Work, and Legacy,
volume 45 of ACM Books. ACM/Morgan & Claypool, 202
Timed Chi: Modeling, Simulation and Verification of Hardware Systems
Timed Chi (chi) is a timed process algebra, designed for Modeling, simulation, verification and real-time control. Its application domain consists of large and complex manufacturing systems. The straightforward syntax and semantics are also highly suited to architects, engineers and researchers from the hardware design community. There are many different tools for timed Chi that support the analysis and manipulation of timed Chi specifications; and such tools are the results of software engineering research with a very strong foundation in formal theories/methods. Since timed Chi is a well-developed algebraic theory from the field of process algebras with timing, we have the idea that timed Chi is also well-suited for addressing various aspects of hardware systems (discrete-time systems by nature). To show that timed Chi is useful for the formal specification and analysis of hardware systems, we illustrate the use of timed Chi with several benchmark examples of hardware systems
Synthesizing SystemC Code from Delay Hybrid CSP
Delay is omnipresent in modern control systems, which can prompt oscillations
and may cause deterioration of control performance, invalidate both stability
and safety properties. This implies that safety or stability certificates
obtained on idealized, delay-free models of systems prone to delayed coupling
may be erratic, and further the incorrectness of the executable code generated
from these models. However, automated methods for system verification and code
generation that ought to address models of system dynamics reflecting delays
have not been paid enough attention yet in the computer science community. In
our previous work, on one hand, we investigated the verification of delay
dynamical and hybrid systems; on the other hand, we also addressed how to
synthesize SystemC code from a verified hybrid system modelled by Hybrid CSP
(HCSP) without delay. In this paper, we give a first attempt to synthesize
SystemC code from a verified delay hybrid system modelled by Delay HCSP
(dHCSP), which is an extension of HCSP by replacing ordinary differential
equations (ODEs) with delay differential equations (DDEs). We implement a tool
to support the automatic translation from dHCSP to SystemC
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