Modeling of a high frequency field effect transitor on indium gallium nitride: the metal oxide semiconductor capacitor 1=channel model

Quantum devices are an important class of modern heterostructure devices in which quantum effects are exploited directly. A Gallium Nitride high frequency field effect transistor (FET), the subject of this work, exploits a newly found exciton source in Indium Gallium Nitride InxGa1-xN. These quasi-particles are used as a quantum electron source for the FET channel, made of Intrinsic Gallium Nitride (GaN). The present work addresses the natural need for providing this high frequency transistor with a device model. Following the same steps as those used in classical Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) modeling, a model for the metal oxide heterojunction capacitor; core of this high frequency field effect transistor, is first developed

Passivation of Amorphous Indium-Gallium-Zinc Oxide (IGZO) Thin-Film Transistors

Thin-film transistors (TFTs) with channel materials made out of hydrogenated amorphous silicon (a-Si:H) and polycrystalline silicon (poly-Si) have been extensively investigated. Amorphous silicon continues to dominate the large-format display technology; however newer technologies demand a higher performance TFT which a-Si:H cannot deliver due to its low electron mobility, µn ~ 1 cm2/V*s. Metal-oxide materials such as Indium-Gallium-Zinc Oxide (IGZO) have demonstrated semiconductor properties, and are candidates to replace a Si:H for TFT backplane technologies. This work involves the fabrication and characterization of TFTs utilizing a-IGZO deposited by RF sputtering. An overview of the process details and results from recently fabricated IGZO TFTs following designed experiments are presented, followed by analysis of electrical results. The investigated process variables were the thickness of the IGZO channel material, passivation layer material, and annealing conditions. The use of electron-beam deposited Aluminum oxide (alumina or Al2O3) as back-channel passivation material resulted in improved device stability; however ID VG transfer characteristics revealed the influence of back-channel interface traps. Results indicate that an interaction effect between the annealing condition (time/temperature) and the IGZO thickness on the electrical behavior of alumina-passivated devices may be significant. A device model implementing fixed charge and donor-like interface traps that are consistent with oxygen vacancies (OV) resulted in a reasonable match to measured characteristics. Modified annealing conditions have resulted in a reduction of back-channel interface traps, with levels comparable to devices fabricated without the addition of passivation material

Interpretation and Regulation of Electronic Defects in IGZO TFTs Through Materials & Processes

The recent rise in the market for consumer electronics has fueled extensive research in the field of display. Thin-Film Transistors (TFTs) are used as active matrix switching devices for flat panel displays such as LCD and OLED. The following investigation involves an amorphous metal-oxide semiconductor that has the potential for improved performance over current technology, while maintaining high manufacturability. Indium-Gallium-Zinc-Oxide (IGZO) is a semiconductor material which is at the onset of commercialization. The low-temperature large-area deposition compatibility of IGZO makes it an attractive technology from a manufacturing standpoint, with an electron mobility that is 10 times higher than current amorphous silicon technology. The stability of IGZO TFTs continues to be a challenge due to the presence of defect states and problems associated with interface passivation. The goal of this dissertation is to further the understanding of the role of defect states in IGZO, and investigate materials and processes needed to regulate defects to the level at which the associated influence on device operation is controlled. The relationships between processes associated with IGZO TFT operation including IGZO sputter deposition, annealing conditions and back-channel passivation are established through process experimentation, materials analysis, electrical characterization, and modeling of electronic properties and transistor behavior. Each of these components has been essential in formulating and testing several hypotheses on the mechanisms involved, and directing efforts towards achieving the goal. Key accomplishments and quantified results are summarized as follows: • XPS analysis identified differences in oxygen vacancies in samples before and after oxidizing ambient annealing at 400 °C, showing a drop in relative integrated area of the O 1s peak from 32% to 19%, which experimentally translates to over a thousand fold decrease in the channel free electron concentration. • Transport behavior at cryogenic temperatures identified variable range hopping as the electron transport mechanism at temperature below 130 K, whereas at temperature greater than 130 K, the current vs temperature response followed an Arrhenius relationship consistent with extended state transport. • Refinement of an IGZO material model for TCAD simulation, which consists of oxygen vacancy donors providing an integrated space charge concentration NVO = +5e15 cm-3, and acceptor-like band-tail states with a total integrated ionized concentration of NTA = -2e18 cm-3. An intrinsic electron mobility was established to be Un = 12.7 cm2/V∙s. • A SPICE-compatible 2D on-state operation model for IGZO TFTs has been developed which includes the integration of drain-impressed deionization of band-tail states and results in a 2D modification of free channel charge. The model provides an exceptional match to measured data and TCAD simulation, with model parameters for channel mobility (Uch = 12 cm2/V∙s) and threshold voltage (VT = 0.14 V) having a close match to TCAD analogs. • TCAD material and device models for bottom-gate and double-gate TFT configurations have been developed which depict the role of defect states on device operation, as well as provide insight and support of a presented hypothesis on DIBL like device behavior associated with back-channel interface trap inhomogeneity. This phenomenon has been named Trap Associated Barrier Lowering (TABL). • A process integration scheme has been developed that includes IGZO back-channel passivation with PECVD SiO2, furnace annealing in O2 at 400 °C, and a thin capping layer of alumina deposited via atomic layer deposition. This process supports device stability when subjected to negative and positive bias stress conditions, and thermal stability up to 140 °C. It also enables TFT operation at short channel lengths (Leff ~ 3 µm) with steep subthreshold characteristics (SS ~ 120 mV/dec). The details of these contributions in the interpretation and regulation of electronic defect states in IGZO TFTs is presented, along with the support of device characteristics that are among the best reported in the literature. Additional material on a complementary technology which utilizes flash-lamp annealing of amorphous silicon will also be described. Flash-Lamp Annealed Polycrystalline Silicon (FLAPS) has realized n-channel and p-channel TFTs with promising results, and may provide an option for future applications with the highest performance demands. IGZO is rapidly emerging as the candidate to replace a-Si:H and address the performance needs of display products produced by large panel manufacturing

An analytical and experimental biosensor for human MIG using AlGaN/GaN based HEMT devices

An amperometric biosensor using AlGaN/GaN based HEMT devices is constructed experimentally and validated through analytical and numerical techniques for detection of a key protein in allograft rejection (Human MIG/CXCL9). The prototype developed provides a reliable sensing platform that will allow label-free and marker-free detection. By exploiting characteristics unique to AlGaN/GaN based HEMT devices, a floating gate configuration is employed to allow reliable sensing without the need for any reference electrode. Self-assembled monolayers (SAM) are formed at the gate surface by using a crosslinker (DSP) to allow for appropriate immobilization of target antibodies. A theoretical analytical and numerical model is developed to explain the mechanism of action of the proposed biosensor. Furthermore, other issues such as repeatability, influence of the substrate, threshold shifting, and device packaging are addressed. Finally, an experimental circuit is constructed with the previously prepared biosensor to validate the claims made in this thesis

Capacitance-Voltage Study on the Effects of Low Energy Electron Radiation on Al\u3ci\u3e\u3csub\u3e0.27\u3c/i\u3e\u3c/sub\u3eGa\u3ci\u3e\u3csub\u3e0.73\u3c/i\u3e\u3c/sub\u3eN/GaN High Electron Mobility Transistor

The effects of radiation on semiconductors are extremely important to the Department of Defense since the majority of the defense informational, navigational and communications systems are now satellite-based. Due to the high radiation tolerance of gallium nitride and a plethora of high temperature, high power and high frequency applications, the prospect that gallium nitride based devices will become key components in a multitude of military satellite-based systems is highly probable. AlGaN/GaN HEMTs were irradiated at low temperature (~80 K) by 0.45 – 0.8 MeV electrons up to fluences of 1×1015 e-/cm2. Following irradiation, low temperature capacitance-voltage measurements were recorded providing fluence-dependent measurements; additionally low-temperature post-irradiation capacitance-voltage measurements were recorded at twenty-four hour intervals up to 72 hours in order to investigate the room temperature annealing process. Using previously irradiated devices, the effects of a 9 month and 12 month room temperature anneal were also considered. Capacitance-voltage measurements indicate that low energy electron radiation results in an increase in the transistor channel drain current. These increases occur both at low and room temperature. The mechanism, clearly shown through capacitance-voltage measurements, causing the increase in drain current is an increase in the carrier concentration in the 2DEG. This result is due to donor electrons from a nitrogen vacancy in the gallium nitride. The devices begin to anneal immediately and show almost complete recovery after 72 hours

Wide Bandgap Based Devices: Design, Fabrication and Applications, Volume II

Wide bandgap (WBG) semiconductors are becoming a key enabling technology for several strategic fields, including power electronics, illumination, and sensors. This reprint collects the 23 papers covering the full spectrum of the above applications and providing contributions from the on-going research at different levels, from materials to devices and from circuits to systems

Radio Frequency InGaAs MOSFETs

III-V-based Indium gallium arsenide is a promising channel material for high-frequency applications due to its superior electron mobility property. In this thesis, InGaAs/InP heterostructure radio frequency MOSFETs are designed, fabricated, and characterized. Various spacer technologies, from high dielectric spacers to air spacers, are implemented to reduce parasitic capacitances, and fT/fmax are evaluated. Three types of RF MOSFETs with different spacer technologies are fabricated in this work.InP ∧-ridge spacers are integrated on InGaAs Nanowire MOSFET in an attempt to decrease parasitic capacitances; however, due to a high-dielectric constant of the spacers and smaller transistors transconductance, the fT/fmax are limited to 75/100 GHz. InGaAs quantum well MOSFETs with a sacrificial amorphous silicon spacer are fabricated, and they have capacitances of a similar magnitude to other existing high-performing RF InGaAs FETs. An 80 nm InGaAs MOSFET has fT/fmax = 243/147 GHz is demonstrated, and further optimization of the channel and layout would improve the performance. Next, InGaAs MOSFETs with nitride spacer are fabricated in a top-down approach, where the heterostructure is designed to reduce contact resistance and thus improve transconductance. In the first attempt, from the electrical characterization, it is concluded that the ON resistance of these MOSFETs is comparable to state-of-the-art HEMTs. Complete non-quasi-static small-signal modeling is performed on these transistors, and the discrepancy in the magnitude of fmax is discussed. InGaAs/InP 3D-nanosheet/nanowire FETs' high-frequency performance is studied by combining intrinsic analytical and extrinsic numerical models to estimate fT/fmax. 3D vertical stacking results in smaller parasitic capacitances due to electric field perturbance because of screening.An 8-band k⋅p model is implemented to calculate the electronic parameters of strained InxGa1-xAs/InP heterostructure-based quantum wells and nanowires. Bandgap, conduction band energy levels, and their effective masses and non-parabolicity factors are studied for various indium compositions and channel dimensions. These calculated parameters are used to model the long channel quantum well InGaAs MOSFET at cryogenic temperatures, and the importance of band tails limiting the subthreshold slope is discussed

Characterization and Fabrication of Active Matrix Thin Film Transistors for an Addressable Microfluidic Electrowetting Channel Device

The characterization and fabrication of active matrix thin film transistors (TFTs) has been studied for an addressable microfluidic electrowetting channel device as application. A new transparent semiconductor material, Amorphous Indium Gallium Zinc Oxide (a-IGZO), is used for TFT, which shows high electrical performance rather than amorphous silicon based TFT; higher mobility and even higher transparency. The purpose of this dissertation is to optimize each TFT process including the optimization of a-IGZO properties to achieve robust device for application. To minimize hysteresis of TFT curves, the gate dielectric is discussed extensively in this dissertation. By optimizing gas ratio of NH3SiH4, it is found that the TFT with NH3 rich SiNx gate dielectric deposited with NH3/SiH4 =5.1 and stoichiometric SiO2 demonstrates best condition to reduce hysteresis. a-IGZO films is investigated as a function of power and substrate bias effect which affects to electrical performance; the higher power and substrate bias increase the carrier density in the film and mainly cause threshold voltage(VT) to shift in the negative gate voltage direction and mobility to increase, respectively. In addition, the powerful method to estimate the electrical properties of a-IGZO is proposed by calculating O2 and IGZO flux during sputtering in which the incorporation ratio with O2/IGZO ≈1 demonstrates the optimized a-IGZO film for TFT. It is confirmed that both physical and chemical adsorption affects the electrical property of a-IGZO channel by studying TFT-IV characteristics with different pressure and analyzing X-ray photoelectron spectroscopy (XPS), which mainly affects the VT instability. The sputtered SiO2 passivation shows better electrical performance. To achieve electrically compatible (lower back channel current) a-IGZO film to SiO2 sputter passivated device, a-IGZO TFTs require oxygen rich a-IGZO back channel by employing two step a-IGZO deposition process (2nd 10nm a-IGZO with PO2 = 1.5mTorr on 1st 40nm a-IGZO with PO2=1mTor). Electrowetting microfluidic channel device as application using a-IGZO TFTs is studied by doing preliminary test. The electrowetting channel test using polymer post device platform is candidate for addressable electrowetting microfluidic channel device driven by active matrix type a-IGZO TFT

Semiconductor Memory Devices for Hardware-Driven Neuromorphic Systems

This book aims to convey the most recent progress in hardware-driven neuromorphic systems based on semiconductor memory technologies. Machine learning systems and various types of artificial neural networks to realize the learning process have mainly focused on software technologies. Tremendous advances have been made, particularly in the area of data inference and recognition, in which humans have great superiority compared to conventional computers. In order to more effectively mimic our way of thinking in a further hardware sense, more synapse-like components in terms of integration density, completeness in realizing biological synaptic behaviors, and most importantly, energy-efficient operation capability, should be prepared. For higher resemblance with the biological nervous system, future developments ought to take power consumption into account and foster revolutions at the device level, which can be realized by memory technologies. This book consists of seven articles in which most recent research findings on neuromorphic systems are reported in the highlights of various memory devices and architectures. Synaptic devices and their behaviors, many-core neuromorphic platforms in close relation with memory, novel materials enabling the low-power synaptic operations based on memory devices are studied, along with evaluations and applications. Some of them can be practically realized due to high Si processing and structure compatibility with contemporary semiconductor memory technologies in production, which provides perspectives of neuromorphic chips for mass production