2,782 research outputs found

    Comprehensive and modular stochastic modeling framework for the variability-aware assessment of Signal Integrity in high-speed links

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    This paper presents a comprehensive and modular modeling framework for stochastic signal integrity analysis of complex high-speed links. Such systems are typically composed of passive linear networks and nonlinear, usually active, devices. The key idea of the proposed contribution is to express the signals at the ports of each of such system elements or subnetworks as a polynomial chaos expansion. This allows one to compute, for each block, equivalent deterministic models describing the stochastic variations of the network voltages and currents. Such models are synthesized into SPICE-compatible circuit equivalents, which are readily connected together and simulated in standard circuit simulators. Only a single circuit simulation of such an equivalent network is required to compute the pertinent statistical information of the entire system, without the need of running a large number of time-consuming electromagnetic circuit co-simulations. The accuracy and efficiency of the proposed approach, which is applicable to a large class of complex circuits, are verified by performing signal integrity investigations of two interconnect examples

    Tensor Computation: A New Framework for High-Dimensional Problems in EDA

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    Many critical EDA problems suffer from the curse of dimensionality, i.e. the very fast-scaling computational burden produced by large number of parameters and/or unknown variables. This phenomenon may be caused by multiple spatial or temporal factors (e.g. 3-D field solvers discretizations and multi-rate circuit simulation), nonlinearity of devices and circuits, large number of design or optimization parameters (e.g. full-chip routing/placement and circuit sizing), or extensive process variations (e.g. variability/reliability analysis and design for manufacturability). The computational challenges generated by such high dimensional problems are generally hard to handle efficiently with traditional EDA core algorithms that are based on matrix and vector computation. This paper presents "tensor computation" as an alternative general framework for the development of efficient EDA algorithms and tools. A tensor is a high-dimensional generalization of a matrix and a vector, and is a natural choice for both storing and solving efficiently high-dimensional EDA problems. This paper gives a basic tutorial on tensors, demonstrates some recent examples of EDA applications (e.g., nonlinear circuit modeling and high-dimensional uncertainty quantification), and suggests further open EDA problems where the use of tensor computation could be of advantage.Comment: 14 figures. Accepted by IEEE Trans. CAD of Integrated Circuits and System

    A Perturbation Scheme for Passivity Verification and Enforcement of Parameterized Macromodels

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    This paper presents an algorithm for checking and enforcing passivity of behavioral reduced-order macromodels of LTI systems, whose frequency-domain (scattering) responses depend on external parameters. Such models, which are typically extracted from sampled input-output responses obtained from numerical solution of first-principle physical models, usually expressed as Partial Differential Equations, prove extremely useful in design flows, since they allow optimization, what-if or sensitivity analyses, and design centering. Starting from an implicit parameterization of both poles and residues of the model, as resulting from well-known model identification schemes based on the Generalized Sanathanan-Koerner iteration, we construct a parameter-dependent Skew-Hamiltonian/Hamiltonian matrix pencil. The iterative extraction of purely imaginary eigenvalues ot fhe pencil, combined with an adaptive sampling scheme in the parameter space, is able to identify all regions in the frequency-parameter plane where local passivity violations occur. Then, a singular value perturbation scheme is setup to iteratively correct the model coefficients, until all local passivity violations are eliminated. The final result is a corrected model, which is uniformly passive throughout the parameter range. Several numerical examples denomstrate the effectiveness of the proposed approach.Comment: Submitted to the IEEE Transactions on Components, Packaging and Manufacturing Technology on 13-Apr-201

    Stochastic macromodeling of nonlinear systems via polynomial chaos expansion and transfer function trajectories

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    A novel approach is presented to perform stochastic variability analysis of nonlinear systems. The versatility of the method makes it suitable for the analysis of complex nonlinear electronic systems. The proposed technique is a variation-aware extension of the Transfer Function Trajectory method by means of the Polynomial Chaos expansion. The accuracy with respect to the classical Monte Carlo analysis is verified by means of a relevant numerical example showing a simulation speedup of 1777 X

    Design and modelling of variability tolerant on-chip communication structures for future high performance system on chip designs

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    The incessant technology scaling has enabled the integration of functionally complex System-on-Chip (SoC) designs with a large number of heterogeneous systems on a single chip. The processing elements on these chips are integrated through on-chip communication structures which provide the infrastructure necessary for the exchange of data and control signals, while meeting the strenuous physical and design constraints. The use of vast amounts of on chip communications will be central to future designs where variability is an inherent characteristic. For this reason, in this thesis we investigate the performance and variability tolerance of typical on-chip communication structures. Understanding of the relationship between variability and communication is paramount for the designers; i.e. to devise new methods and techniques for designing performance and power efficient communication circuits in the forefront of challenges presented by deep sub-micron (DSM) technologies. The initial part of this work investigates the impact of device variability due to Random Dopant Fluctuations (RDF) on the timing characteristics of basic communication elements. The characterization data so obtained can be used to estimate the performance and failure probability of simple links through the methodology proposed in this work. For the Statistical Static Timing Analysis (SSTA) of larger circuits, a method for accurate estimation of the probability density functions of different circuit parameters is proposed. Moreover, its significance on pipelined circuits is highlighted. Power and area are one of the most important design metrics for any integrated circuit (IC) design. This thesis emphasises the consideration of communication reliability while optimizing for power and area. A methodology has been proposed for the simultaneous optimization of performance, area, power and delay variability for a repeater inserted interconnect. Similarly for multi-bit parallel links, bandwidth driven optimizations have also been performed. Power and area efficient semi-serial links, less vulnerable to delay variations than the corresponding fully parallel links are introduced. Furthermore, due to technology scaling, the coupling noise between the link lines has become an important issue. With ever decreasing supply voltages, and the corresponding reduction in noise margins, severe challenges are introduced for performing timing verification in the presence of variability. For this reason an accurate model for crosstalk noise in an interconnection as a function of time and skew is introduced in this work. This model can be used for the identification of skew condition that gives maximum delay noise, and also for efficient design verification

    From blind certainty to informed uncertainty

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    A Novel Framework for Parametric Loewner Matrix Interpolation

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    The generation of black-box macromodels of passive components at the chip, package, and board levels has become an important step of the electronic design automation (EDA) workflow. The vector fitting (VF) scheme is a very popular method for the extraction of such macromodels, and several multivariate extensions are now available for embedding external parameters in the model structure, thus enabling model-based variability analysis and design optimization. The Loewner matrix interpolation framework was recently suggested as an effective and promising alternative macromodeling approach to VF. In this article, we propose a parametric version of Loewner interpolation, which embeds orthogonal polynomials as an integral part of the parameterization framework. This approach is shown to be efficient and accurate and presents various advantages with respect to competing multivariate rational interpolation methods. These advantages include better control of model smoothness in the parameter space and a particularly efficient implementation of the singular value decomposition, which is the core of the model extraction scheme. These advantages are confirmed through several examples relevant for signal and power integrity applications
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