Improved Decoding of Staircase Codes: The Soft-aided Bit-marking (SABM) Algorithm

Staircase codes (SCCs) are typically decoded using iterative bounded-distance decoding (BDD) and hard decisions. In this paper, a novel decoding algorithm is proposed, which partially uses soft information from the channel. The proposed algorithm is based on marking certain number of highly reliable and highly unreliable bits. These marked bits are used to improve the miscorrection-detection capability of the SCC decoder and the error-correcting capability of BDD. For SCCs with $2$-error-correcting Bose-Chaudhuri-Hocquenghem component codes, our algorithm improves upon standard SCC decoding by up to $0.30$~dB at a bit-error rate (BER) of $10^{-7}$. The proposed algorithm is shown to achieve almost half of the gain achievable by an idealized decoder with this structure. A complexity analysis based on the number of additional calls to the component BDD decoder shows that the relative complexity increase is only around $4\%$ at a BER of $10^{-4}$. This additional complexity is shown to decrease as the channel quality improves. Our algorithm is also extended (with minor modifications) to product codes. The simulation results show that in this case, the algorithm offers gains of up to $0.44$~dB at a BER of $10^{-8}$.Comment: 10 pages, 12 figure

Miscorrection-free Decoding of Staircase Codes

We propose a novel decoding algorithm for staircase codes which reduces the effect of undetected component code miscorrections. The algorithm significantly improves performance, while retaining a low-complexity implementation suitable for high-speed optical transport networks

Generalized Spatially-Coupled Product-Like Codes Using Zipper Codes With Irregular Degree

Zipper codes with irregular variable degree are studied. Two new interleaver maps -- chevron and half-chevron -- are described. Simulation results with shortened double-error-correcting Bose--Chaudhuri--Hocquenghem constituent codes show that zipper codes with chevron and half-chevron interleaver maps outperform staircase codes when the rate is below 0.86 and 0.91, respectively, at $10^{-8}$ output bit error rate operating point. In the miscorrection-free decoding scheme, both zipper codes with chevron and half-chevron interleaver maps outperform staircase codes. However, constituent decoder miscorrections induce additional performance gaps.Comment: 6 pages, 11 figures, paper accepted for the GLOBECOM 2023 Workshop on Channel Coding Beyond 5

Binary Message Passing Decoding of Product-like Codes

We propose a novel binary message passing decoding algorithm for product-like codes based on bounded distance decoding (BDD) of the component codes. The algorithm, dubbed iterative BDD with scaled reliability (iBDD-SR), exploits the channel reliabilities and is therefore soft in nature. However, the messages exchanged by the component decoders are binary (hard) messages, which significantly reduces the decoder data flow. The exchanged binary messages are obtained by combining the channel reliability with the BDD decoder output reliabilities, properly conveyed by a scaling factor applied to the BDD decisions. We perform a density evolution analysis for generalized low-density parity-check (GLDPC) code ensembles and spatially coupled GLDPC code ensembles, from which the scaling factors of the iBDD-SR for product and staircase codes, respectively, can be obtained. For the white additive Gaussian noise channel, we show performance gains up to $0.29$ dB and $0.31$ dB for product and staircase codes compared to conventional iterative BDD (iBDD) with the same decoder data flow. Furthermore, we show that iBDD-SR approaches the performance of ideal iBDD that prevents miscorrections.Comment: Accepted for publication in the IEEE Transactions on Communication

A Soft-Aided Staircase Decoder Using Three-Level Channel Reliabilities

The soft-aided bit-marking (SABM) algorithm is based on the idea of marking bits as highly reliable bits (HRBs), highly unreliable bits (HUBs), and uncertain bits to improve the performance of hard-decision (HD) decoders. The HRBs and HUBs are used to assist the HD decoders to prevent miscorrections and to decode those originally uncorrectable cases via bit flipping (BF), respectively. In this paper, an improved SABM algorithm (called iSABM) is proposed for staircase codes (SCCs). Similar to the SABM, iSABM marks bits with the help of channel reliabilities, i.e., using the absolute values of the log-likelihood ratios. The improvements offered by iSABM include: (i) HUBs being classified using a reliability threshold, (ii) BF randomly selecting HUBs, and (iii) soft-aided decoding over multiple SCC blocks. The decoding complexity of iSABM is comparable of that of SABM. This is due to the fact that on the one hand no sorting is required (lower complexity) because of the use of a threshold for HUBs, while on the other hand multiple SCC blocks use soft information (higher complexity). Additional gains of up to 0.53 dB with respect to SABM and 0.91 dB with respect to standard SCC decoding at a bit error rate of $10^{-6}$ are reported. Furthermore, it is shown that using 1-bit reliability marking, i.e., only having HRBs and HUBs, only causes a gain penalty of up to 0.25 dB with a significantly reduced memory requirement

Improving HD-FEC decoding via bit marking

We review the recently introduced soft-aided bit-marking (SABM) algorithm and its suitability for product codes. Some aspects of the implementation of the SABM algorithm are discussed. The influence of suboptimal channel soft information is also analyzed.Comment: OECC 201

30% Reach Increase via Low-complexity Hybrid HD/SD FEC and Nonlinearity-tolerant 4D Modulation

Current optical coherent transponders technology is driving data rates towards 1 Tb/s/{\lambda}and beyond. This trend requires both high-performance coded modulation schemes and efficient implementation of the forward-error-correction (FEC) decoder. A possible solution to this problem is combining advanced multidimensional modulation formats with low-complexity hybrid HD/SD FEC decoders. Following this rationale, in this paper we combine two recently introduced coded modulation techniques:the geometrically-shaped 4D-64 polarization ring-switched and the soft-aided bit-marking-scaled reliability decoder. This joint scheme enabled us to experimentally demonstrate the transmission of 11x218 Gbit/s channels over transatlantic distances at 5.2bit/4D-sym. Furthermore, a 30% reach increase is demonstrated over PM-8QAM and conventional HD-FEC decoding for product codes.Comment: This work has been submitted to IEEE Photonics Technology Letter

Improved Soft-Aided Decoding of Product Codes With Dynamic Reliability Scores

Products codes (PCs) are conventionally decoded with efficient iterative bounded-distance decoding (iBDD) based on hard-decision channel outputs which entails a performance loss compared to a soft-decision decoder. Recently, several hybrid algorithms have been proposed aimed to improve the performance of iBDD decoders via the aid of a certain amount of soft information while keeping the decoding complexity similarly low as in iBDD. We propose a novel hybrid low-complexity decoder for PCs based on error-and-erasure (EaE) decoding and dynamic reliability scores (DRSs). This decoder is based on a novel EaE component code decoder, which is able to decode beyond the designed distance of the component code but suffers from an increased miscorrection probability. The DRSs, reflecting the reliability of a codeword bit, are used to detect and avoid miscorrections. Simulation results show that this policy can reduce the miscorrection rate significantly and improves the decoding performance. The decoder requires only ternary message passing and a slight increase of computational complexity compared to iBDD, which makes it suitable for high-speed communication systems. Coding gains of up to 1.2 dB compared to the conventional iBDD decoder are observed