16 research outputs found

    A 1.2 V and 69 mW 60 GHz Multi-channel Tunable CMOS Receiver Design

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    A multi-channel receiver operating between 56 GHz and 70 GHz for coverage of different 60 GHz bands worldwide is implemented with a 90 nm Complementary Metal-Oxide Semiconductor (CMOS) process. The receiver containing an LNA, a frequency down-conversion mixer and a variable gain amplifier incorporating a band-pass filter is designed and implemented. This integrated receiver is tested at four channels of centre frequencies 58.3 GHz, 60.5 GHz, 62.6 GHz and 64.8 GHz, employing a frequency plan of an 8 GHz-intermediate frequency (IF). The achieved conversion gain by coarse gain control is between 4.8 dB–54.9 dB. The millimeter-wave receiver circuit is biased with a 1.2V supply voltage. The measured power consumption is 69 mW

    Laser driver design in 65-nm CMOS technology for IFoF optical links

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    Broadband mobile networks have experimented an accelerated growth in the passed five decades culminating this development with 5G networks. This evolution demands an efficient and not expensive solution for optical-wireless front-end. Thus, information delivered by mobile stations is repeated over a Distributed Antenna System (DAS), where Remote Antenna Unit (RAU) integer optical and wireless modules. A non-linear response from light source means a major problem for an analog signal in comparison with digital one. The main problem with non linearity is signal dispersion giving as result alteration of signal shape form. In this direction there are some options from IC electronic design to interact with optical source, first the use of a linear drive circuit that delivers a certain amount of electric current for a voltage input signal, the second option is the use of pre-distortion or post-distortion electronic blocks to guarantee a lineal response from optical source. This work supposes a first approach and design of a linear laser driver in 65-nm CMOS technology that includes layout design

    Laser driver design in 65-nm CMOS technology for IFoF optical links

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    Broadband mobile networks have experimented an accelerated growth in the passed five decades culminating this development with 5G networks. This evolution demands an efficient and not expensive solution for optical-wireless front-end. Thus, information delivered by mobile stations is repeated over a Distributed Antenna System (DAS), where Remote Antenna Unit (RAU) integer optical and wireless modules. A non-linear response from light source means a major problem for an analog signal in comparison with digital one. The main problem with non linearity is signal dispersion giving as result alteration of signal shape form. In this direction there are some options from IC electronic design to interact with optical source, first the use of a linear drive circuit that delivers a certain amount of electric current for a voltage input signal, the second option is the use of pre-distortion or post-distortion electronic blocks to guarantee a lineal response from optical source. This work supposes a first approach and design of a linear laser driver in 65-nm CMOS technology that includes layout design

    CMOS linear laser driver for intermediate frequency over fiber (IFoF) links

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    The main objective of the proposed linear laser driver (LLD) is to reduce signal distortion in an analog direct modulation laser configuration used for intermediate frequency over fiber links. This work draws on an open-loop configuration featuring two differential pair blocks in a cascade arrangement to achieve a bandwidth measurement of 415 MHz at the half-power point, a total harmonic distortion of 4.57% for a fundamental frequency of 100 MHz, and an amplitude of 100 mVpp. The LLD provides a gain of 12.3 dB for a differential output and an output impedance of 46 Ω. The design, layout, and integration correspond to the process design kit for TSMC 65-nm CMOS technology. Experimental results show the advantage over other previously reported laser drivers

    High gain narrow band LNA design for Wi-max applications at 3.5GHZ

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    The wireless communication has been experiencing tremendous growth in technology. The demand has been increased for low cost RFIC designs. Many researches are going on front end design of RF transceiver. The design of receiver path has become a challenging aspect, because of increased interferences around the communication path. Transmitter path design is easy because interference levels are very less compared to signal level. As the operating frequency is higher in RFIC design, receiver path also experiencing the internal noises in the system. The performance of transceiver depends on each of the individual blocks such as low noise amplifiers. In this thesis, Two RF CMOS narrow band LNAs (cascade and differential) are designed. They are designed for the IEEE 802.16 standard in the 3.5 GHz band for Wi-MAX applications. Low noise amplifier is used as the first block after the receiving antenna. This LNA is placed before the mixer in the receiver path for amplification. The LNA must have good gain and low NF to avoid further degradation of receiver path. This thesis focuses on design of a high gain LNAs with acceptable noise figure operating at 3.5GHz. Inductive Source degeneration method is used to match the circuit to source impedance in all the designs. All the circuits operate with 1.8v supply voltage. Here in this thesis, Enhanced cascode LNA exhibits a gain of 26.88dB and NF of 2.55dB and the Differential LNA exhibits a gain of 32.71dB and NF of 2.66dB. The circuits are designed using cadence 0.18µm RF CMOS technology

    Radiowave propagation and antennas for high data rate mobile communications in the 60 GHz band

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    The 60 GHz MIMO systems are seen as some of the best candidates for the implementation of future high data-rate short range communications systems such as wireless personal area networks (WPAN). Although the performance of MIMO systems has been studied thoroughly theoretically and experimentally at lower frequencies like at 2 and 5 GHz, there is a clear lack of measurement data and experimental performance evaluations of MIMO techniques at 60 GHz. Furthermore, more effort is still needed in the design and evaluation of compact low cost 60 GHz antennas for communication applications. In the first part of the thesis, the first 60 GHz MIMO channel measurement system is presented. It is based on a previously developed 2 and 5 GHz sounder and frequency converters. This system uses virtual antenna arrays to create the channel matrix. A measurement campaign is reported. In order to improve the delay resolution, two other MIMO measurement systems are presented, based on an ultra wide band (UWB) sounder and a vector network analyzer (VNA). Those systems allow full characterization of the MIMO channel in the delay and angular domains. In the second part of this work, the performance of multi-antenna techniques is evaluated based on the measurement data obtained in the first part of the thesis. Three of the most promising multi-antenna techniques, namely MIMO, antenna selection MIMO, and beam steering, are analyzed and compared. The presented results indicate that the mutual information of the measured MIMO channel is quite close to that of the independent and identically distributed (i.i.d.) MIMO Rayleigh channel. Furthermore, in realistic conditions it is seen that MIMO-antenna selection often leads to lower mutual information than traditional MIMO with the same number of RF chains. Moreover, it is shown that when considering phase shifters with realistic losses, MIMO technique almost always outperforms beam steering technique. In the last part of the thesis a 60 GHz planar omnidirectional antenna is presented. This antenna is very suitable for communications applications since it has low profile and uses a metal layer only on one side of the substrate. Therefore, it can be manufactured easily and at very low cost. In addition, an advanced quasi full 3-D radiation pattern measurement system has been developed to evaluate probe-fed antennas. Very good measurement repeatability is reported. The radiation of the probe is analyzed and is seen to be the main limitation of the dynamic range of the measurement setup

    Design and characterization of monolithic millimeter-wave active and passive components, low-noise and power amplifiers, resistive mixers, and radio front-ends

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    This thesis focuses on the design and characterization of monolithic active and passive components, low-noise and power amplifiers, resistive mixers, and radio front-ends for millimeter-wave applications. The thesis consists of 11 publications and an overview of the research area, which also summarizes the main results of the work. In the design of millimeter-wave active and passive components the main focus is on realized CMOS components and techniques for pushing nanoscale CMOS circuits beyond 100 GHz. Test structures for measuring and analyzing these components are shown. Topologies for a coplanar waveguide, microstrip line, and slow-wave coplanar waveguide that are suitable for implementing transmission lines in nanoscale CMOS are presented. It is demonstrated that the proposed slow-wave coplanar waveguide improves the performance of the transistor-matching networks when compared to a conventional coplanar waveguide and the floating slow-wave shield reduces losses and simplifies modeling when extended below other passives, such as DC decoupling and RF short-circuiting capacitors. Furthermore, wideband spiral transmission line baluns in CMOS at millimeter-wave frequencies are demonstrated. The design of amplifiers and a wideband resistive mixer utilizing the developed components in 65-nm CMOS are shown. A 40-GHz amplifier achieved a +6-dBm 1-dB output compression point and a saturated output power of 9.6 dBm with a miniature chip size of 0.286 mm². The measured noise figure and gain of the 60-GHz amplifier were 5.6 dB and 11.5 dB, respectively. The V-band balanced resistive mixer achieved a 13.5-dB upconversion loss and 34-dB LO-to-RF isolation with a chip area of 0.47 mm². In downconversion, the measured conversion loss and 1-dB input compression point were 12.5 dB and +5 dBm, respectively. The design and experimental results of low-noise and power amplifiers are presented. Two wideband low-noise amplifiers were implemented in a 100-nm metamorphic high electron mobility transistor (HEMT) technology. The amplifiers achieved a 22.5-dB gain and a 3.3-dB noise figure at 94 GHz and a 18-19-dB gain and a 5.5-7.0-dB noise figure from 130 to 154 GHz. A 60-GHz power amplifier implemented in a 150-nm pseudomorphic HEMT technology exhibited a +17-dBm 1-dB output compression point with a 13.4-dB linear gain. In this thesis, the main system-level aspects of millimeter-wave transmitters and receivers are discussed and the experimental circuits of a 60-GHz transmitter front-end and a 60-GHz receiver with an on-chip analog-to-digital converter implemented in 65-nm CMOS are shown. The receiver exhibited a 7-dB noise figure, while the saturated output power of the transmitter front-end was +2 dBm. Furthermore, a wideband W-band transmitter front-end with an output power of +6.6 dBm suitable for both image-rejecting superheterodyne and direct-conversion transmission is demonstrated in 65-nm CMOS

    Millimeter-wave integrated circuits in 65-nm CMOS

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    KEY FRONT-END CIRCUITS IN MILLIMETER-WAVE SILICON-BASED WIRELESS TRANSMITTERS FOR PHASED-ARRAY APPLICATIONS

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    Millimeter-wave (mm-Wave) phased arrays have been widely used in numerous wireless systems to perform beam forming and spatial filtering that can enhance the equivalent isotropically radiated power (EIRP) for the transmitter (TX). Regarding the existing phased-array architectures, an mm-Wave transmitter includes several building blocks to perform the desired delivered power and phases for wireless communication. Power amplifier (PA) is the most important building block. It needs to offer several advantages, e.g., high efficiency, broadband operation and high linearity. With the recent escalation of interest in 5G wireless communication technologies, mm-Wave transceivers at the 5G frequency bands (e.g., 28 GHz, 37 GHz, 39 GHz, and 60 GHz) have become an important topic in both academia and industry. Thus, PA design is a critical obstacle due to the challenges associated with implementing wideband, highly efficient and highly linear PAs at mm-Wave frequencies. In this dissertation, we present several PA design innovations to address the aforementioned challenges. Additionally, phase shifter (PS) also plays a key role in a phased-array system, since it governs the beam forming quality and steering capabilities. A high-performance phase shifter should achieve a low insertion loss, a wide phase shifting range, dense phase shift angles, and good input/output matching.Ph.D

    A SiGe BiCMOS LNA for mm-wave applications

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    A 5 GHz continuous unlicensed bandwidth is available at millimeter-wave (mm-wave) frequencies around 60 GHz and offers the prospect for multi gigabit wireless applications. The inherent atmospheric attenuation at 60 GHz due to oxygen absorption makes the frequency range ideal for short distance communication networks. For these mm-wave wireless networks, the low noise amplifier (LNA) is a critical subsystem determining the receiver performance i.e., the noise figure (NF) and receiver sensitivity. It however proves challenging to realise high performance mm-wave LNAs in a silicon (Si) complementary metal-oxide semiconductor (CMOS) technology. The mm-wave passive devices, specifically on-chip inductors, experience high propagation loss due to the conductivity of the Si substrate at mm-wave frequencies, degrading the performance of the LNA and subsequently the performance of the receiver architecture. The research is aimed at realising a high performance mm-wave LNA in a Si BiCMOS technology. The focal points are firstly, the fundamental understanding of the various forms of losses passive inductors experience and the techniques to address these issues, and secondly, whether the performance of mm-wave passive inductors can be improved by means of geometry optimising. An associated hypothesis is formulated, where the research outcome results in a preferred passive inductor and formulates an optimised passive inductor for mm-wave applications. The performance of the mm-wave inductor is evaluated using the quality factor (Q-factor) as a figure of merit. An increased inductor Q-factor translates to improved LNA input and output matching performance and contributes to the lowering of the LNA NF. The passive inductors are designed and simulated in a 2.5D electromagnetic (EM) simulator. The electrical characteristics of the passive structures are exported to a SPICE netlist which is included in a circuit simulator to evaluate and investigate the LNA performance. Two LNAs are designed and prototyped using the 13μ-m SiGe BiCMOS process from IBM as part of the experimental process to validate the hypothesis. One LNA implements the preferred inductor structures as a benchmark, while the second LNA, identical to the first, replaces one inductor with the optimised inductor. Experimental verification allows complete characterization of the passive inductors and the performance of the LNAs to prove the hypothesis. According to the author's knowledge, the slow-wave coplanar waveguide (S-CPW) achieves a higher Q-factor than microstrip and coplanar waveguide (CPW) transmission lines at mm-wave frequencies implemented for the 130 nm SiGe BiCMOS technology node. In literature, specific S-CPW transmission line geometry parameters have previously been investigated, but this work optimises the signal-to-ground spacing of the S-CPW transmission lines without changing the characteristic impedance of the lines. Optimising the S-CPW transmission line for 60 GHz increases the Q-factor from 38 to 50 in simulation, a 32 % improvement, and from 8 to 10 in measurements. Furthermore, replacing only one inductor in the output matching network of the LNA with the higher Q-factor inductor, improves the input and output matching performance of the LNA, resulting in a 5 dB input and output reflection coefficient improvement. Although a 5 dB improvement in matching performance is obtained, the resultant noise and gain performance show no significant improvement. The single stage LNAs achieve a simulated gain and NF of 13 dB and 5.3 dB respectively, and dissipate 6 mW from the 1.5 V supply. The LNA focused to attain high gain and a low NF, trading off linearity and as a result obtained poor 1 dB compression of -21.7 dBm. The LNA results are not state of the art but are comparable to SiGe BiCMOS LNAs presented in literature, achieving similar gain, NF and power dissipation figures.Dissertation (MEng)--University of Pretoria, 2012.Electrical, Electronic and Computer Engineeringunrestricte
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