MTAC - A Multithreaded VLIW Architecture for PRAM Simulation

Multithreaded processors are the key components for hiding the latency of long operations slowing down the execution of parallel programs, because they can execute other processes while a process is waiting for a long operation to complete. In this paper we outline and evaluate a MultiThreaded VLIW processor Architecture with functional unit Chaining (MTAC), which is specially designed for efficient PRAM simulation. According to experiments MTAC offers remarkably better performance than a basic pipelined RISC architecture and chaining improves the exploitation of instruction level parallelism to the level where the achieved speedup corresponds the number of functional units in a processor. Keywords: PRAM, VLIW, multithreading One of the key components of such simulations is multithreaded processor. In this paper we outline a MultiThreaded VLIW processor Architecture with functional unit Chaining (MTAC), which is specially designed for efficient PRAM simulation. MTAC features very sho..