On the Trade-Off Between Quality Factor and Tuning Ratio in Tunable High-Frequency Capacitors

A benchmark of tunable and switchable devices at microwave frequencies is presented on the basis of physical limitations to show their potential for reconfigurable cellular applications. Performance limitations are outlined for each given technology focusing on the quality factor (Q) and tuning ratio (eta) as figures of merit. The state of the art in terms of these figures of merit of several tunable and switchable technologies is visualized and discussed. If the performance of these criteria is not met, the application will not be feasible. The quality factor can typically be traded off for tuning ratio. The benchmark of tunable capacitor technologies shows that transistor-switched capacitors, varactor diodes, and ferroelectric varactors perform well at 2 GHz for tuning ratios below 3, with an advantage for GaAs varactor diodes. Planar microelectromechanical capacitive switches have the potential to outperform all other technologies at tuning ratios higher than 8. Capacitors based on tunable dielectrics have the highest miniaturization potential, whereas semiconductor devices benefit from the existing manufacturing infrastructure

A 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS

© 2017 Elsevier Ltd. All rights reserved.A 0.1–5.0 GHz flexible software-defined radio (SDR) receiver with digitally assisted calibration is presented, employing a zero-IF/low-IF reconfigurable architecture for both wideband and narrowband applications. The receiver composes of a main-path based on a current-mode mixer for low noise, a high linearity sub-path based on a voltage-mode passive mixer for out-of-band rejection, and a harmonic rejection (HR) path with vector gain calibration. A dual feedback LNA with “8” shape nested inductor structure, a cascode inverter-based TCA with miller feedback compensation, and a class-AB full differential Op-Amp with Miller feed-forward compensation and QFG technique are proposed. Digitally assisted calibration methods for HR, IIP2 and image rejection (IR) are presented to maintain high performance over PVT variations. The presented receiver is implemented in 65 nm CMOS with 5.4 mm2 core area, consuming 9.6–47.4 mA current under 1.2 V supply. The receiver main path is measured with +5 dB m/+5dBm IB-IIP3/OB-IIP3 and +61dBm IIP2. The sub-path achieves +10 dB m/+18dBm IB-IIP3/OB-IIP3 and +62dBm IIP2, as well as 10 dB RF filtering rejection at 10 MHz offset. The HR-path reaches +13 dB m/+14dBm IB-IIP3/OB-IIP3 and 62/66 dB 3rd/5th-order harmonic rejection with 30–40 dB improvement by the calibration. The measured sensitivity satisfies the requirements of DVB-H, LTE, 802.11 g, and ZigBee.Peer reviewedFinal Accepted Versio

A programmable microsystem using system-on-chip for real-time biotelemetry

A telemetry microsystem, including multiple sensors, integrated instrumentation and a wireless interface has been implemented. We have employed a methodology akin to that for System-on-Chip microelectronics to design an integrated circuit instrument containing several "intellectual property" blocks that will enable convenient reuse of modules in future projects. The present system was optimized for low-power and included mixed-signal sensor circuits, a programmable digital system, a feedback clock control loop and RF circuits integrated on a 5 mm × 5 mm silicon chip using a 0.6 μm, 3.3 V CMOS process. Undesirable signal coupling between circuit components has been investigated and current injection into sensitive instrumentation nodes was minimized by careful floor-planning. The chip, the sensors, a magnetic induction-based transmitter and two silver oxide cells were packaged into a 36 mm × 12 mm capsule format. A base station was built in order to retrieve the data from the microsystem in real-time. The base station was designed to be adaptive and timing tolerant since the microsystem design was simplified to reduce power consumption and size. The telemetry system was found to have a packet error rate of 10<sup>-</sup><sup>3</sup> using an asynchronous simplex link. Trials in animal carcasses were carried out to show that the transmitter was as effective as a conventional RF device whilst consuming less power

Programmable photonics : an opportunity for an accessible large-volume PIC ecosystem

We look at the opportunities presented by the new concepts of generic programmable photonic integrated circuits (PIC) to deploy photonics on a larger scale. Programmable PICs consist of waveguide meshes of tunable couplers and phase shifters that can be reconfigured in software to define diverse functions and arbitrary connectivity between the input and output ports. Off-the-shelf programmable PICs can dramatically shorten the development time and deployment costs of new photonic products, as they bypass the design-fabrication cycle of a custom PIC. These chips, which actually consist of an entire technology stack of photonics, electronics packaging and software, can potentially be manufactured cheaper and in larger volumes than application-specific PICs. We look into the technology requirements of these generic programmable PICs and discuss the economy of scale. Finally, we make a qualitative analysis of the possible application spaces where generic programmable PICs can play an enabling role, especially to companies who do not have an in-depth background in PIC technology

Integrated phased array systems in silicon

Silicon offers a new set of possibilities and challenges for RF, microwave, and millimeter-wave applications. While the high cutoff frequencies of the SiGe heterojunction bipolar transistors and the ever-shrinking feature sizes of MOSFETs hold a lot of promise, new design techniques need to be devised to deal with the realities of these technologies, such as low breakdown voltages, lossy substrates, low-Q passives, long interconnect parasitics, and high-frequency coupling issues. As an example of complete system integration in silicon, this paper presents the first fully integrated 24-GHz eight-element phased array receiver in 0.18-μm silicon-germanium and the first fully integrated 24-GHz four-element phased array transmitter with integrated power amplifiers in 0.18-μm CMOS. The transmitter and receiver are capable of beam forming and can be used for communication, ranging, positioning, and sensing applications

A 300-800MHz Tunable Filter and Linearized LNA applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver

A multiband flexible RF-sampling receiver aimed at software-defined radio is presented. The wideband RF sampling function is enabled by a recently proposed discrete-time mixing downconverter. This work exploits a voltage-sensing LNA preceded by a tunable LC pre-filter with one external coil to demonstrate an RF-sampling receiver with low noise figure (NF) and high harmonic rejection (HR). The second-order LC filter provides voltage pre-gain and attenuates the source noise aliasing, and it also improves the HR ratio of the sampling downconverter. The LNA consists of a simple amplifier topology built from inverters and resistors to improve the third-order nonlinearity via an enhanced voltage mirror technique. The RF-sampling receiver employs 8 times oversampling covering 300 to 800 MHz in two RF sub-bands. The chip is realized in 65 nm CMOS and the measured gain across the band is between 22 and 28 dB, while achieving a NF between 0.8 to 4.3 dB. The IIP2 varies between +38 and +49 dBm and the IIP3 between -14 dBm and -9 dBm, and the third and fifth order HR ratios are more than 60 dB. The LNA and downconverter consumes 6 mW, and the clock generator takes 12 mW at 800 MHz RF.\ud \u

Low cost ground receiving systems for television signals from high powered communications satellites, volume 1

The fabrication and evaluation of 10 engineering prototype ground signal processing systems of three converter types are reported for use with satellite television. Target cost converters and cost sensitivity analysis are discussed along with the converter configurations

A fully integrated multiband frequency synthesizer for WLAN and WiMAX applications

This paper presents a fractional N frequency synthesizer which covers WLAN and WiMAX frequencies on a single chip. The synthesizer is fully integrated in 0.35μm BiCMOS AMS technology except crystal oscillator. The synthesizer operates at four frequency bands (3.101-3.352GHz, 3.379-3.727GHz, 3.7-4.2GHz, 4.5-5.321GHz) to provide the specifications of 802.16 and 802.11 a/b/g/y. A single on-chip LC - Gm based VCO is implemented as the core of this synthesizer. Different frequency bands are selected via capacitance switching and fine tuning is done using varactor for each of these bands. A bandgap reference circuit is implemented inside of this charge pump block to generate temperature and power supply independent reference currents. Simulated settling time is around 10μsec. Total power consumption is measured to be 118.6mW without pad driving output buffers from a 3.3V supply. The phase noise of the oscillator is lower than -116.4dbc/Hz for all bands. The circuit occupies 2.784 mm2 on Si substrate, including DC, Digital and RF pads

Wideband Self-Adaptive RF Cancellation Circuit for Full-Duplex Radio: Operating Principle and Measurements

This paper presents a novel RF circuit architecture for self-interference cancellation in inband full-duplex radio transceivers. The developed canceller is able to provide wideband cancellation with waveform bandwidths in the order of 100 MHz or beyond and contains also self-adaptive or self-healing features enabling automatic tracking of time-varying self-interference channel characteristics. In addition to architecture and operating principle descriptions, we also provide actual RF measurements at 2.4 GHz ISM band demonstrating the achievable cancellation levels with different bandwidths and when operating in different antenna configurations and under low-cost highly nonlinear power amplifier. In a very challenging example with a 100 MHz waveform bandwidth, around 41 dB total cancellation is obtained while the corresponding cancellation figure is close to 60 dB with the more conventional 20 MHz carrier bandwidth. Also, efficient tracking in time-varying reflection scenarios is demonstrated.Comment: 7 pages, to be presented in 2015 IEEE 81st Vehicular Technology Conferenc