Robust massive MIMO Equilization for mmWave systems with low resolution ADCs

Leveraging the available millimeter wave spectrum will be important for 5G. In this work, we investigate the performance of digital beamforming with low resolution ADCs based on link level simulations including channel estimation, MIMO equalization and channel decoding. We consider the recently agreed 3GPP NR type 1 OFDM reference signals. The comparison shows sequential DCD outperforms MMSE-based MIMO equalization both in terms of detection performance and complexity. We also show that the DCD based algorithm is more robust to channel estimation errors. In contrast to the common believe we also show that the complexity of MMSE equalization for a massive MIMO system is not dominated by the matrix inversion but by the computation of the Gram matrix.Comment: submitted to WCNC 2018 Workshop

Linear Precoding with Low-Resolution DACs for Massive MU-MIMO-OFDM Downlink

We consider the downlink of a massive multiuser (MU) multiple-input multiple-output (MIMO) system in which the base station (BS) is equipped with low-resolution digital-to-analog converters (DACs). In contrast to most existing results, we assume that the system operates over a frequency-selective wideband channel and uses orthogonal frequency division multiplexing (OFDM) to simplify equalization at the user equipments (UEs). Furthermore, we consider the practically relevant case of oversampling DACs. We theoretically analyze the uncoded bit error rate (BER) performance with linear precoders (e.g., zero forcing) and quadrature phase-shift keying using Bussgang's theorem. We also develop a lower bound on the information-theoretic sum-rate throughput achievable with Gaussian inputs, which can be evaluated in closed form for the case of 1-bit DACs. For the case of multi-bit DACs, we derive approximate, yet accurate, expressions for the distortion caused by low-precision DACs, which can be used to establish lower bounds on the corresponding sum-rate throughput. Our results demonstrate that, for a massive MU-MIMO-OFDM system with a 128-antenna BS serving 16 UEs, only 3--4 DAC bits are required to achieve an uncoded BER of 10^-4 with a negligible performance loss compared to the infinite-resolution case at the cost of additional out-of-band emissions. Furthermore, our results highlight the importance of taking into account the inherent spatial and temporal correlations caused by low-precision DACs

Efficient DSP and Circuit Architectures for Massive MIMO: State-of-the-Art and Future Directions

Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio (NR) and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely energy-efficient implementations. These exploit opportunities in deeply-scaled silicon technologies and perform partly distributed processing to cope with the bottlenecks encountered in the interconnection of many signals. For example, prototype ASIC implementations have demonstrated zero-forcing precoding in real time at a 55 mW power consumption (20 MHz bandwidth, 128 antennas, multiplexing of 8 terminals). Coarse and even error-prone digital processing in the antenna paths permits a reduction of consumption with a factor of 2 to 5. This article summarizes the fundamental technical contributions to efficient digital signal processing for Massive MIMO. The opportunities and constraints on operating on low-complexity RF and analog hardware chains are clarified. It illustrates how terminals can benefit from improved energy efficiency. The status of technology and real-life prototypes discussed. Open challenges and directions for future research are suggested.Comment: submitted to IEEE transactions on signal processin

Cross-Layer Optimization for Power-Efficient and Robust Digital Circuits and Systems

With the increasing digital services demand, performance and power-efficiency become vital requirements for digital circuits and systems. However, the enabling CMOS technology scaling has been facing significant challenges of device uncertainties, such as process, voltage, and temperature variations. To ensure system reliability, worst-case corner assumptions are usually made in each design level. However, the over-pessimistic worst-case margin leads to unnecessary power waste and performance loss as high as 2.2x. Since optimizations are traditionally confined to each specific level, those safe margins can hardly be properly exploited. To tackle the challenge, it is therefore advised in this Ph.D. thesis to perform a cross-layer optimization for digital signal processing circuits and systems, to achieve a global balance of power consumption and output quality. To conclude, the traditional over-pessimistic worst-case approach leads to huge power waste. In contrast, the adaptive voltage scaling approach saves power (25% for the CORDIC application) by providing a just-needed supply voltage. The power saving is maximized (46% for CORDIC) when a more aggressive voltage over-scaling scheme is applied. These sparsely occurred circuit errors produced by aggressive voltage over-scaling are mitigated by higher level error resilient designs. For functions like FFT and CORDIC, smart error mitigation schemes were proposed to enhance reliability (soft-errors and timing-errors, respectively). Applications like Massive MIMO systems are robust against lower level errors, thanks to the intrinsically redundant antennas. This property makes it applicable to embrace digital hardware that trades quality for power savings.Comment: 190 page

Lousy processing increases energy efficiency in massive MIMO systems

Massive MIMO (MaMIMO) is a key technology for 5G wireless communication, enabling large increase in both spectral and energy efficiency at the same time. Before it can be deployed, it is important to find efficient implementation strategies. Because of the many antennas, an essential part of decreasing complexity, and further improving energy efficiency, is optimization of the digital signal processing (DSP) in the per-antenna functions. Assuming an orthogonal frequency-division multiplexing (OFDM) based MaMIMO system, this paper explores coarse quantization in the per-antenna digital transmit filters and inverse fast Fourier transforms (IFFTs) and evaluates it in terms of performance and complexity savings. Results show that DSP complexity can be greatly reduced per-antenna, and therefore significant power savings can be achieved, with limited performance degradation. More specifically, when going towards MaMIMO and therefore increasing the number of antennas from 8 to 64, it is possible to reduce the complexity in each transmit filter by 55%. Also, when using 6 bits to represent the input signal and 6 bits for the filter coefficients, this results in an SNR degradation of less than 0.5 dB compared to floating-point performance. Consequently, we conclude that the overall system energy greatly benefits from lousy per-antenna processing