Improving Student Comprehension Through Interactive Microarchitecture Simulation and Visualization

The curricula of most Computer Science departments include at least one course on computer organization and assembly language. The seminal concepts covered by such courses bridge the gap between hardware and software by introducing multiple layers of abstraction. Appalachian State University introduces this material in the course “Introduction to Computer Systems.” The course uses the hypothetical LC-3 processor, as presented in Patt and Patel’s textbook “Introduction to Computing Systems: From Bits & Gates to C & Beyond (2nd edition).” Prior to the completion of the work presented in this thesis, tools existed for the assembly of LC-3 programs and simulation of the assembled code; however, no simulator existed to demonstrate the function of the microarchitectural level. In this thesis, research on educational simulators is presented, with an emphasis on microarchitectural and graphical style simulators. Multiple simulators were reviewed to determine which elements are pedagogically e?ective. Based on these ?ndings, a graphical microarchitecture simulator named lc3uarch was implemented. The simulator targets the microarchitectural level of the LC-3 processor. Student surveys responses indicated that the use of lc3uarch can help students comprehend the logic components of the LC-3 microarchitecture and provided ideas for making the tool more e?ective

VisibleZ: A Mainframe Architecture Emulator for Computing Education

This paper describes a PC-based mainframe computer emulator called VisibleZ and its use in teaching mainframe Computer Organization and Assembly Programming classes. VisibleZ models IBM’s z/Architecture and allows direct interpretation of mainframe assembly language object code in a graphical user interface environment that was developed in Java. The VisibleZ emulator acts as an interactive visualization tool to simulate enterprise computer architecture. The provided architectural components include main storage, CPU, registers, Program Status Word (PSW), and I/O Channels. Particular attention is given to providing visual clues to the user by color-coding screen components, machine instruction execution, and animation of the machine architecture components. Students interact with VisibleZ by executing machine instructions in a step-by-step mode, simultaneously observing the contents of memory, registers, and changes in the PSW during the fetch-decode-execute machine instruction cycle. The object-oriented design and implementation of VisibleZ allows students to develop their own instruction semantics by coding Java for existing specific z/Architecture machine instructions or design and implement new machine instructions. The use of VisibleZ in lectures, labs, and assignments is described in the paper and supported by a website that hosts an extensive collection of related materials. VisibleZ has been proven a useful tool in mainframe Assembly Language Programming and Computer Organization classes. Using VisibleZ, students develop a better understanding of mainframe concepts, components, and how the mainframe computer works. ACM Computing Classification System (1998): C.0, K.3.2

Proceedings of the Second Program Visualization Workshop, 2002

The Program Visualization Workshops aim to bring together researchers who design and construct program visualizations and, above all, educators who use and evaluate visualizations in their teaching. The first workshop took place in July 2000 at Porvoo, Finland. The second workshop was held in cooperation with ACM SIGCSE and took place at HornstrupCentret, Denmark in June 2002, immediately following the ITiCSE 2002 Conference in Aarhus, Denmark

Porting of the MPS3 Educational Emulator to RISC-V

Teaching operating systems to students has always been a challenging task for lecturers. To address this issue, educational architectures, and emulators have been developed to offer students an easier entry point into the subject matter. In this context, Virtual Square has created a simplified architecture named MPS, along with its emulator. This simplified architecture serves as a starting point for students to familiarize themselves with the operating systems, allowing them to gain foundational knowledge and understanding in the field. Virtual Square has developed a range of software tools that emulate the MIPS and ARM RISC architectures. In recent years, RISC-V has emerged as a new and interesting RISC architecture. Known for its open-source nature, RISC-V offers a promising instruction set architecture. One of its significant advantages is the ability for students and professionals to directly study and customize the architecture, making it a valuable resource for learning and exploration. This thesis aims to expand Virtual Square’s software family by incorporating the new RISC-V architecture, inheriting the skeleton of the previous project MPS3

Visualization of microprocessor execution in computer architecture courses: a case study at Kabul University

Magister Scientiae - MScComputer architecture and assembly language programming microprocessor execution are basic courses taught in every computer science department. Generally, however, students have difficulties in mastering many of the concepts in the courses, particularly students whose first language is not English. In addition to their difficulties in understanding the purpose of given instructions, students struggle to mentally visualize the data movement, control and processing operations. To address this problem, this research proposed a graphical visualization approach and investigated the visual illustrations of such concepts and instruction execution by implementing a graphical visualization simulator as a teaching aid. The graphical simulator developed during the course of this research was applied in a computer architecture course at Kabul University, Afghanistan. Results obtained from student evaluation of the simulator show significant levels of success using the visual simulation teaching aid. The results showed that improved learning was achieved, suggesting that this approach could be useful in other computer science departments in Afghanistan, and elsewhere where similar challenges are experienced.South Afric