306,668 research outputs found

    AMC: Advanced Multi-accelerator Controller

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    The rapid advancement, use of diverse architectural features and introduction of High Level Synthesis (HLS) tools in FPGA technology have enhanced the capacity of data-level parallelism on a chip. A generic FPGA based HLS multi-accelerator system requires a microprocessor (master core) that manages memory and schedules accelerators. In a real environment, such HLS multi-accelerator systems do not give a perfect performance due to memory bandwidth issues. Thus, a system demands a memory manager and a scheduler that improves performance by managing and scheduling the multi-accelerator’s memory access patterns efficiently. In this article, we propose the integration of an intelligent memory system and efficient scheduler in the HLS-based multi-accelerator environment called Advanced Multi-accelerator Controller (AMC). The AMC system is evaluated with memory intensive accelerators, High Performance Computing (HPC) applications and implemented and tested on a Xilinx Virtex-5 ML505 evaluation FPGA board. The performance of the system is compared against the microprocessor-based systems that have been integrated with the operating system. Results show that the AMC based HLS multi-accelerator system achieves 10.4x and 7x of speedup compared to the MicroBlaze and Intel Core based HLS multi-accelerator systems.Peer ReviewedPostprint (author’s final draft

    From FPGA to ASIC: A RISC-V processor experience

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    This work document a correct design flow using these tools in the Lagarto RISC- V Processor and the RTL design considerations that must be taken into account, to move from a design for FPGA to design for ASIC

    PICES Press, Vol. 19, No. 1, Winter 2011

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    •2010 PICES Science: A Note from the Former Science Board Chairman (pp. 1-4) •2010 PICES Awards (pp. 5-7) •The First Year of FUTURE: A Progress Report (pp. 8-13) •New Chairmen in PICES (pp. 14-19) •Pacific Ocean Interior Carbon Data Synthesis, PACIFICA, in Progress (pp. 20-23) •2011 PICES Calendar (p. 23) •Ecosystems 2010: Global Progress on Ecosystem-based Fisheries Management (pp. 24-26) •PICES 2010 Rapid Assessment Survey (pp. 27-29) •PICES Workshop on “An Introduction to Rapid Assessment Survey Methodologies for Application in Developing Countries” (pp. 30-31) •The State of the Western North Pacific in the First Half of 2010 (pp. 32-34) •PICES Interns (p. 34) •The State of the Bering Sea in 2010 (pp. 35-37) •The State of the Northeast Pacific in 2010 (pp. 38-40

    Document Classification Systems in Heterogeneous Computing Environments

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    Datacenter workloads demand high throughput, low cost and power efficient solutions. In most data centers the operating costs dominates the infrastructure cost. The ever growing amounts of data and the critical need for higher throughput, more energy efficient document classification solutions motivated us to investigate alternatives to the traditional homogeneous CPU based implementations of document classification systems. Several heterogeneous systems were investigated in the past where CPUs were combined with GPUs and FPGAs as system accelerators. The increasing complexity of FPGAs made them an interesting device in the heterogeneous computing environments and on the other hand difficult to program using Hardware Description languages. We explore the trade-offs when using high level synthesis and low level synthesis when programming FPGAs. Using low level synthesis results in less hardware resource usage on FPGAs and also offers the higher throughput compared to using HLS tool. While using HLS tool different heterogeneous computing devices such as multicore CPU and GPU targeted. Through our implementation experience and empirical results for data centric applications, we conclude that we can achieve power efficient results for these set of applications by either using low level synthesis or high level synthesis for programming FPGAs

    Examining the Development Effects of Modern-Era Streetcars: An Assessment of Portland and Seattle

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    Most U.S. cities pursuing streetcars are doing so primarily for their purported development effects, as opposed to for their transportation role, yet there is little evidence about the nature or magnitude of these development effects due to a scarcity of rigorous, empirical research. Most available work simply presents descriptive information about development outcomes (typically measured as changes in population, employment, land values, or permit activity) within streetcar corridors as indicators of the streetcar’s development effects. Alternate factors which may have influenced such results are often not considered, placing into question the validity of such measures.This study examines the development effects of streetcar investments in two U.S. cities that implemented streetcar service between 2000 and 2010: Portland, Oregon, and Seattle, Washington. The authors explore the development outcomes (here measured as the number of permits issued) through a combination of statistical analysis of development activity in the streetcar corridor and interviews with key streetcar stakeholders. The statistical results indicate that areas around Portland’s initial streetcar line experienced higher levels of development activity (more permits issued) than areas not served by the streetcar, although the differences in activity between served and not served areas since the opening of the second line have been insignificant. In Seattle, the areas around the streetcar line in the South Lake Union neighborhood experienced greater commercial development activity (commercial permits issued) but less residential activity than nearby unserved areas. The interviews provide important local context for the interpretation of the empirical results and highlight the continued importance of development as a rationale for streetcar investments, as well as to the limitations of the streetcar as a transportation service

    PICES Press, Vol. 12, No. 1, January 2004

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    The state of PICES science - 2003 (pdf 281 KB) 2003 Wooster Award (pdf 764 KB) The state of the eastern North Pacific through summer 2003 (pdf 448 KB) The Bering Sea: Current status and recent events (pdf 951 KB) The state of the western North Pacific in the first half of 2003 (pdf 684 KB) The status of oceanic zooplankton in the eastern North Pacific (pdf 390 KB) The precautionary approach to the PDO (pdf 976 KB) Photo highlights of PICES XII (pdf 2.79 MB) William G. Pearcy: Renaissance oceanographer (pdf 2.86 MB) KORDI/PICES/CoML Workshop on "Variability and status of the Yellow Sea and East China Sea ecosystems (pdf 785 KB) PICES/IOC Workshop on "Harmful algal blooms - Harmonization of data" (pdf 330 KB) From physics to predators: Monitoring North Pacific ecosystem dynamics (pdf 270 KB) Toward a coast-wide network of Northeast Pacific coastal-ocean monitoring programs - a brief workshop report (pdf 640) PICES publications (pdf 103 KB) PICES calendar (pdf 45 KB

    An Adaptive Design Methodology for Reduction of Product Development Risk

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    Embedded systems interaction with environment inherently complicates understanding of requirements and their correct implementation. However, product uncertainty is highest during early stages of development. Design verification is an essential step in the development of any system, especially for Embedded System. This paper introduces a novel adaptive design methodology, which incorporates step-wise prototyping and verification. With each adaptive step product-realization level is enhanced while decreasing the level of product uncertainty, thereby reducing the overall costs. The back-bone of this frame-work is the development of Domain Specific Operational (DOP) Model and the associated Verification Instrumentation for Test and Evaluation, developed based on the DOP model. Together they generate functionally valid test-sequence for carrying out prototype evaluation. With the help of a case study 'Multimode Detection Subsystem' the application of this method is sketched. The design methodologies can be compared by defining and computing a generic performance criterion like Average design-cycle Risk. For the case study, by computing Average design-cycle Risk, it is shown that the adaptive method reduces the product development risk for a small increase in the total design cycle time.Comment: 21 pages, 9 figure

    PICES Press, Vol. 17, No. 1, January 2009

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    Major Outcomes from the 2008 PICES Annual Meeting: A Note from the Chairman (pdf, 0.1 Mb) PICES Science – 2008 (pdf, 0.1 Mb) 2008 PICES Awards (pdf, 0.3 Mb) Charles B. Miller – A Selective Biography (pdf, 0.4 Mb) Latest and Upcoming PICES Publications (pdf, 0.1 Mb) 2008 OECOS Workshop in Dalian (pdf, 0.2 Mb) PICES Calendar (pdf, 0.1 Mb) 2008 PICES Workshop on “Climate Scenarios for Ecosystem Modeling (II)” (pdf, 0.1 Mb) PICES/ESSAS Workshop on “Marine Ecosystem Model Inter-Comparisons” (pdf, 0.2 Mb) Highlights of the PICES Seventeenth Annual Meeting (pdf, 0.5 Mb) 2008 PICES Summer School on “Ecosystem-Based Management” (pdf, 0.3 Mb) 4th PICES Workshop on “The Okhotsk Sea and Adjacent Areas” (pdf, 0.2 Mb) PICES WG 21 Rapid Assessment Surveys (pdf, 0.4 Mb) PICES Interns (pdf, 0.3 Mb) PICES @ Oceans in a High CO2 World (pdf, 0.1 Mb) Coping with Global Change in Marine Social–Ecological Systems: An International Symposium (pdf, 0.1 Mb) The State of the Western North Pacific in the First Half of 2008 (pdf, 1.3 Mb) State of the Northeast Pacific through 2008 (pdf, 0.3 Mb) The Bering Sea: Current Status and Recent Events (pdf, 0.2 Mb) An Opinion Born of Years of Observing Timeseries Observations (pdf, 0.1 Mb) New Chairman for the PICES Fishery Science Committee (pdf, 0.1 Mb
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